LV86

DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver February 1997 DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver General Description The DS34LV86T is a high speed quad differential CMOS receiver that meets the requirements of both TIA/EIA-422-B and ITU-T V.11. The CMOS DS34LV86T features typical low static ICC of 9 mA which makes it ideal for battery powered and power conscious applications. The TRI-STATE ® enables, EN, allow the device to be disabled when not in use to minimize power consumption. The dual enable scheme allows for flexibility in turning receivers on and off. The receiver output (RO) is guaranteed to be High when the inputs are left open. The receiver can detect signals as low as ± 200 mV over the common mode range of ± 10V. The receiver outputs (RO) are compatible with TTL and LVCMOS levels. Features n n n n n n n n n Low power CMOS design (30 mW typical) Interoperable with existing 5V RS-422 networks Industrial temperature range Meets TIA/EIA-422-B (RS-422) and ITU-T V.11 recommendation 3.3V Operation ± 7V common mode range VID = 3V ± 10V common mode range VID = 0.2V Receiver OPEN input failsafe feature Guaranteed AC parameter: Maximum Receiver Skew: 4 ns Transition time: 10 ns Pin compatible with DS34C86T 32 MHz Toggle Frequency 6.5k ESD Tolerance (HBM) Available in SOIC packaging n n n n Connection Diagram Dual-In-Line Package Truth Table Enable EN L H H H L = Logic Low H = Logic High X = Irrelevant Z = TRI-STATE † = Open, Not Term...