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LV8573AM Dataheets PDF



Part Number LV8573AM
Manufacturers National Semiconductor
Logo National Semiconductor
Description LV8573A Low Voltage Real Time Clock (RTC)
Datasheet LV8573AM DatasheetLV8573AM Datasheet (PDF)

LV8573A Real Time Clock (RTC) PRELIMINARY December 1993 LV8573A Low Voltage Real Time Clock (RTC) General Description The LV8573A is intended for use in microprocessor based systems where information is required for multi-tasking data logging or general time of day date information This device is implemented in low voltage silicon gate microCMOS technology to provide low standby power in battery back-up environments The circuit’s architecture is such that it looks like a contiguous block of me.

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LV8573A Real Time Clock (RTC) PRELIMINARY December 1993 LV8573A Low Voltage Real Time Clock (RTC) General Description The LV8573A is intended for use in microprocessor based systems where information is required for multi-tasking data logging or general time of day date information This device is implemented in low voltage silicon gate microCMOS technology to provide low standby power in battery back-up environments The circuit’s architecture is such that it looks like a contiguous block of memory or I O ports organized as one block of 32 bytes This includes the Control Registers the Clock Counters the Alarm Compare RAM and the Time Save RAM Time and date are maintained from 1 100 of a second to year and leap year in a BCD format 12 or 24 hour modes Day of week and day of month counters are provided Time is controlled by an on-chip crystal oscillator requiring only the addition of the 32 768 kHz crystal and two capacitors Power failure logic and control functions have been integrated on chip This logic is used by the RTC to issue a power fail interrupt and lock out the mP interface The time power fails may be logged into RAM automatically when VBB l VCC Additionally two supply pins are provided When VBB l VCC internal circuitry will automatically switch from the main supply to the battery supply The LV8573A’s interrupt structure provides three basic types of interrupts Periodic Alarm Compare and Power Fail Interrupt mask and status registers enable the masking and easy determination of each interrupt Features Y Y Y Y 3 3V g 10% supply Full function real time clock calendar 12 24 hour mode timekeeping Day of week counter Parallel resonant oscillator Power fail features Internal power supply switch to external battery Power Supply Bus glitch protection Automatic log of time into RAM at power failure On-chip interrupt structure Periodic alarm and power fail interrupts Block Diagram TL F 11418 – 1 FIGURE 1 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 11418 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) Operation Conditions Supply Voltage (VCC) (Note 3) Supply Voltage (VBB) (Note 3) DC Input or Output Voltage (VIN VOUT) Operation Temperature (TA) Electr-Static Discharge Rating Typical Values iJA DIP Board Socket iJA PLCC Board Socket Min 30 22 00 b 40 If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications b 0 5V to a 7 0V Supply Voltage (VCC) b 0 5V to VCC a 0 5V DC Input Voltage (VIN) b 0 5V to VCC a 0 5V DC Output Voltage (VOUT) b 65 C to a 150 C Storage Temperature Range Power Dissipation (PD) 500 mW Lead Temperature (Soldering 10 sec ) 260 C Max 36 VCCb0 4 VCC a 85 Unit V V V C kV 1 61 C W 67 C W 80 C W 88 C W DC Electrical Characteristics VCC e 3 3V g 10% VBB e 2 5V VPFAIL l VIH CL e 100 pF unless otherwise specified Symbol VIH VIL VOH VOL IIN IOZ ILKG ICC Parameter High Level Input Voltage (Note 4) Low Level Input Voltage High Level Output Voltage (Excluding OSC OUT INTR) Low Level Output Voltage (Excluding OSC OUT) Input Current (Except OSC IN) Output TRI-STATE Current Output High Leakage Current MFO INTR Pins Quiescent Supply Current (Note 6) Conditions Any Inputs Except OSC IN OSC IN with External Clock All Inputs Except OSC IN OSC IN with External Clock IOUT e b20 mA IOUT e b2 0 mA IOUT e b20 mA IOUT e 2 0 mA VIN e VCC or GND VOUT e VCC or GND VOUT e VCC or GND Outputs Open Drain FOSC e 32 768 kHz VIN e VCC or GND (Note 5) VIN e VCC or GND (Note 6) VIN e VIH or VIL (Note 6) VBB e GND VIN e VCC or GND FOSC e 32 768 kHz VCC e GND OSC OUT e open circuit other pins e GND FOSC e 32 768 kHz 2 2V s VBB s 2 6V other pins at GND VCC e GND VBB e 2 6V VCC e 3 6V VBB e 2 2V Min 20 VBB b 0 2 b0 3 b0 3 Max VCC a 0 3 08 02 Units V V V V V V VCC b0 2 24 02 03 g0 7 g1 g1 V V mA mA mA 220 700 5 30 mA mA mA mA ICC Quiescent Supply Current (Single Supply Mode) (Note 7) Standby Mode Battery Supply Current (Note 7) Battery Leakage IBB 8 mA IBLK 08 b0 8 mA mA Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur Note 2 Unless otherwise specified all voltages are referenced to ground Note 3 In battery backed mode VBB s VCC b 0 4V Single Supply Mode Data retention voltage is 2 2V min In single Supply Mode (Power connected to VCC pin) 3 0V s VCC s 3 6V Note 4 This parameter (VIH) is not tested on all pins at the same time Note 5 This specification tests ICC with all power fail circuitry disabled by setting D7 of Interrupt Control Register 1 to 0 Note 6 This specification tests ICC with all power fail circuitry enabled by setting D7 of Interrupt Control Register 1 to 1 Note 7 OSC IN is driven by a signal generator Contents of the Test Register e 00(H) and the MFO pin is not configured as buffered oscillator out 2 AC Electrical Characteristics VCC e 3 3V g 10% VBB .


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