CXL1504M

CXL1504M CMOS-CCD 1H Delay Line for NTSC Description The CXL1504M is a delay line used in conjunction with an external low-pass filter. Through negative phase input and positive phase output 1H delay time is obtained for NTSC signals. Features Single 5V power supply 14.3MHz driver Low power consumption at 160mW (Typ.) Built-in peripheral circuits Completely adjustment free Functions 905.5-bit CCD register Clock driver Autobias circuit Input clamp circuit Sample and hold circuit Structure CMOS-CCD Absolute Maximum Ratings (Ta = 25°C) Supply voltage VDD Operating temperature Topr Storage temperature Tstg Allowable power dissipation PD Operating Voltage Range (Ta = 25°C) Supply voltage VDD 20 pin SOP (Plastic) 6 –10 to +60 –55 to +150 500 V °C °C mW 5 ± 5% V Recommended Clock Conditions (Ta = 25°C) Input clock amplitude VCLK 0.3 to 1.0 Clock frequency fCLK 14.318182 Input clock waveform sine wave Input Signal Amplitude VSIG 560 Vp-p (0.5Vp-p typ.) MHz mVp-p (Max.) Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E71217A78-PS CXL1504M Block Diagram and Pin Configuration (Top View) SUB CLK VDD VDD V...