Document
CXD1178Q
8-bit 40MSPS RGB 3-channel D/A Converter
Description The CXD1178Q is an 8-bit high-speed D/A converter for video band use. It has an input/output equivalent to 3 channels of R, G and B. It is suitable for use of digital TV, graphic display, and others. Features • Resolution 8-bit • Maximum conversion speed 40MSPS • RGB 3-channel input/output • Differential linearity error ±0.3LSB • Low power consumption 240 mW (200 Ω load at 2 Vp-p output) • Single 5 V power supply • Low glitch noise • Stand-by function Structure Silicon gate CMOS IC 48 pin QFP (Plastic)
Absolute Maximum Ratings (Ta=25 °C) • Supply voltage AVDD, DVDD 7 V • Input voltage (All pins) VIN VDD+0.5 to VSS–0.5 V • Output current (Every each channel) IOUT 0 to 15 mA • Storage temperature Tstg –55 to +150 °C
Recommended Operating Conditions • Supply voltage AVDD, AVSS 4.75 to 5.25 V DVDD, DVSS 4.75 to 5.25 V • Reference input voltage VREF 2.0 V • Clock pulse width TPW1, TPW0 11.2 ns (min.) to 1.1 µs (max.) • Operating temperature Topr –40 to +85 °C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E90603F01
CXD1178Q
Block Diagram
(LSB) R0 R1 R2 R3 R4 R5 R6 (MSB) R7 (LSB) G0
1 2 3 4 5 6 7 8 9
DECODER DECODER
2LSB’S CURRENT CELLS
47 DVDD 48 DVDD
36 RO LATCHES 6MSB’S CURRENT CELLS 37 RO
27 RCK CLOCK GENERATOR 2LSB’S CURRENT CELLS
43 AVDD 44 AVDD 45 AVDD 46 AVDD 38 GO
G1 10 G2 11 G3 12 G4 13 G5 14 G6 15 (MSB) G7 16 (LSB) B0 17 B1 18 B2 19 DECODER DECODER LATCHES
6MSB’S CURRENT CELLS
39 GO
28 GCK CLOCK GENERATOR 2LSB’S CURRENT CELLS
33 AVSS 30 DVSS 31 DVSS
40 BO B3 20 B4 21 B5 22 B6 23 (MSB) B7 24 DECODER CLOCK GENERATOR DECODER LATCHES 6MSB’S CURRENT CELLS 41 BO
29 BCK 42 VG 34 VREF
BLK 25 CE 26
CURRENT CELLS (FOR FULL SCALE) BIAS VOLTAGE GENERATOR
35 IREF
32 VB
—2—
CXD1178Q
VREF
Pin Configuration
IREF RO
DVSS
AVSS
DVSS
GCK
BCK
RCK
36 RO 37 GO 38 GO 39 BO BO VG AVDD AVDD AVDD AVDD DVDD DVDD 40 41 42 43 44 45 46 47 48
35
34
33
32
31
30
29
28
27
26
25 24 B7 23 B6 22 B5 21 B4 20 B3 19 B2 18 B1 17 B0 16 G7 15 G6 14 G5 13 G4
1
R0
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
G0
10
11
12
G1
G2
Pin Description and I/O Pins Equivalent Circuit Pin No. 1 to 8 Symbol R0 to R7
1
I/O
Equivalent circuit
G3
BLK
VB
CE
Description
DVDD
9 to 16
G0 to G7
I
to 24 DVSS
Digital input R0 (LSB) to R7 (MSB) G0 (LSB) to G7 (MSB) B0 (LSB) to B7 (MSB)
17 to 24
B0 to B7
DVDD
25
BLK
I
25
DVSS
Blanking input. This is synchronized with the clock input signal for each channel. No signal at “H” (Output 0 V). Output condition at “L”.
DVDD
DVDD
32
VB
O
32
Connect a capacitor of about 0.1 µF.
DVSS
—3—
.