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CXB1581Q Dataheets PDF



Part Number CXB1581Q
Manufacturers Sony Corporation
Logo Sony Corporation
Description Fibre Channel Transmitter
Datasheet CXB1581Q DatasheetCXB1581Q Datasheet (PDF)

CXB1581Q Fibre Channel Transmitter Description The CXB1581Q is a transmitter IC with a built-in PLL for high-speed serial data transmission. It can be used together with the receiver IC CXB1582Q as a chip set, and 1062.5Mbaud, 20-bit or 531.25Mbaud, 10-bit operation can be selected. Features • Conforms to ANSI X3T11 Fibre channel standard • Supports GLM (Gigabaud Link Module) interface • Built-in PLL for synthesizing a low-jitter clock • Single 3.3V power supply or dual 3.3V/5V power supply (for.

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CXB1581Q Fibre Channel Transmitter Description The CXB1581Q is a transmitter IC with a built-in PLL for high-speed serial data transmission. It can be used together with the receiver IC CXB1582Q as a chip set, and 1062.5Mbaud, 20-bit or 531.25Mbaud, 10-bit operation can be selected. Features • Conforms to ANSI X3T11 Fibre channel standard • Supports GLM (Gigabaud Link Module) interface • Built-in PLL for synthesizing a low-jitter clock • Single 3.3V power supply or dual 3.3V/5V power supply (for 5V TTL interface) operation can be selected. • Low power consumption: 830mW (Typ.) when operating with a single 3.3V power supply • 1062.5Mbaud, 20-bit or 531.25Mbaud, 10-bit operation can be selected. • Test pattern (±K28.5) generation circuit 80 pin QFP (Plastic) Applications Fibre channel 1062.5Mbaud and 531.25Mbaud communications Structure Bipolar silicon monolithic IC Pin Configuration LDALM VEEP1 VCCG SDSEL LPF_A LPF_B R_FLT VEEP2 SDDIS VEEP1 REXT CLR∗ VCCP VCCG VEEG VCCP LBEN TCLKSEL∗ ECLKSEL∗ 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VEEE 61 VEEE 62 EXCLK∗ 63 EXCLK 64 SDIN∗ 65 SDIN 66 VCCE 67 VCCE 68 SDOUT∗ 69 SDOUT 70 VCCE 71 LBOUT∗ 72 LBOUT 73 VCCE 74 VCCE 75 PSOUT∗ 76 PSOUT 77 VEEE 78 TJMON1 79 TJMON2 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 NC 39 ALTSEL∗ 38 TPGEN 37 PPSEL 36 SDRSEL 35 BYTSEL 34 TBC_IN 33 VCCG 32 VEEG 31 TX19 30 TX18 29 TX17 28 TX16 27 TX15 26 TX14 25 TX13 24 TX12 23 TX11 22 TX10 21 VEEG VEET LKDT∗ TX00 VCCT5 TX05 TX06 VEET VCCT3 VCCG TBC_OUT FAULT Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– VCCG TX04 VEEG TX03 TX02 TX01 TX07 TX08 TX09 NC E95912A64-ST CXB1581Q Absolute Maximum Ratings (VEEE, VEET, VEEG, VEEP = 0V) Item Supply voltage (excluding VCCT5) Supply voltage for TTL output TTL DC input voltage ECL DC input voltage ECL differential input voltage TTL output current (High level) TTL output current (Low level) ECL output current Operating ambient temperature Storage temperature Symbol VCC VCCT5 VI_T VI_E VIS_E IOH_T IOL_T IO_E Ta Tstg Min. –0.3 VCCG – 2, or –0.3 –0.5 VCC – 2 –2 –20 0 –30 –55 –65 Typ. Max. 4 VCCG + 5, or 5.5 5.5 VCC 2 0 20 0 70 150 Unit V V V V V mA mA mA °C °C Recommended Operating Conditions (VEEE, VEET, VEEG, VEEP = 0V) During single 3.3V power supply operation Item Supply voltage (including VCCT5) Ambient temperature Symbol VCC Ta Min. 3.135 0 Typ. 3.3 Max. 3.465 70 Unit V °C During dual 3.3V/5V power supply operation (VCCT3 open) Item Supply voltage (excluding VCCT5) Power supply for TTL output Ambient temperature Symbol VCC VCCT5 Ta Min. 3.135 4.75 0 Typ. 3.3 5 Max. 3.465 5.25 70 Unit V V °C –2– CXB1581Q Block Diagram SDRSEL ALTSEL∗ SDSEL SDIN SDIN∗ 53.125Mbaud TX00 to 09 10 Parallel Data Input Buffer 53.125Mbaud TX10 to 19 10 10 10 P/S Converter 531.25 or 1062.5Mbaud 1 0 1 0 BYTSEL TPGEN SDDIS LBEN SDOUT SDOUT∗ LBOUT LBOUT∗ PSOUT PSOUT∗ PPSEL TBC_EN 53.125MHz R Q RSFF S FAULT TBC_IN LPF_A 53.125MHz PLL 531.25 or 1062.5MHz TBC OUT LPF_B REXT 1 0 LKDT∗ EXCLK ECLKSEL∗ –3– LDALM R_FLT EXCLK∗ TCLKSEL∗ CXB1581Q Pin Description Pin No. Symbol Type Power supply Power supply Power supply Typical pin I/O voltage 0V Equivalent circuit Description Negative power supplies for internal logic gate. Positive power supplies for internal logic gate. Negative power supplies for TTL output. VCCT5 1, 21, VEEG 32, 49 2, 20, 33,50, VCCG 51 3, 4 VEET — 3.3V — 0V — VCCT3 5 LKDT∗ TTL output TTL level LKDT∗ PLL lock detection signal output. This pin outputs low level when the PLL is locked to TBC_IN and operating normally, and high level when the PLL is not operating normally. VEET VCCT5 VCCT3 6 FAULT TTL output TTL level FAULT FAULT signal output. This pin is used for the FAULT signal in the GLM standard. This pin outputs high level at the rising edge of LDALM and low level at the falling edge of R_RLT. (See Table 3.) VEET VCCT5 VCCT3 7 TBC_OUT TTL output TTL level TBC_OUT Transmission byte clock output (53.125MHz). This clock is generated by frequency-dividing the transmission bit clock (1.0625GHz or 531.25MHz). VEET –4– CXB1581Q Pin No. Symbol Type Typical pin I/O voltage Equivalent circuit Description VCCT5 8 VCCT3 Power 3.3V or open supply VCCG VCCT3 VEET Positive power supply for TTL output. Set to 3.3V when using the IC with a single 3.3V power supply; leave open when using the IC with a dual 3.3V/5V power supply. VCCT5 9 VCCT5 Power supply VCCT3 3.3V or 5V VCCG Positive power supply for TTL output. Set to 3.3V when using the IC with a single 3.3V power supply; to 5V when using the IC with a dua.


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