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CXA1372BQ Dataheets PDF



Part Number CXA1372BQ
Manufacturers Sony Corporation
Logo Sony Corporation
Description RF Signal Processing Servo Amplifier for CD Player
Datasheet CXA1372BQ DatasheetCXA1372BQ Datasheet (PDF)

CXA1372BQ/BS RF Signal Processing Servo Amplifier for CD Player Description The CXA1372BQ/BS is a bipolar IC developed for RF signal processing (focus OK, mirror, defect detection, EFM comparator) and various servo control. Features • Dual ±5V and single 5V power supplies • Low power consumption • Fewer external parts • Disc defect countermeasure circuit • Fully compatible with the CXA1182 for microcomputer software Functions • Auto asymmetry control • Focus OK detection circuit • Mirror detecti.

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CXA1372BQ/BS RF Signal Processing Servo Amplifier for CD Player Description The CXA1372BQ/BS is a bipolar IC developed for RF signal processing (focus OK, mirror, defect detection, EFM comparator) and various servo control. Features • Dual ±5V and single 5V power supplies • Low power consumption • Fewer external parts • Disc defect countermeasure circuit • Fully compatible with the CXA1182 for microcomputer software Functions • Auto asymmetry control • Focus OK detection circuit • Mirror detection circuit • Defect detection, countermeasure circuit • EFM comparator • Focus servo control • Tracking servo control • Sled servo control Structure Bipolar silicon monolithic IC CXA1372BQ 48 pin QFP (Plastic) CXA1372BS 48 pin SDIP (Plastic) Absolute Maximum Ratings (Ta = 25°C) 12 V • Supply voltage VCC – VEE • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 457 (CXA1372BQ) mW 833 (CXA1372BS) mW Recommended Operating Conditions VCC – VEE 3.6 to 11 VCC – DGND 3.6 to 5.5 V V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E95927A67-PS CXA1372BQ/BS Block Diagram C. OUT DGND DFCT SENS XRST 24 DATA CB 37 CP 38 RFI 39 • TTL ↓ • IIL 23 XLT 22 CLK 21 LOCK • IIL DATA REGISTER DVEE 41 • TTL ↓ • IIL • INPUT SHIFT REGISTER • ADDRESS DECODER 20 DIRC 19 AVEE TG1 TM1 • I SET ATSC 45 • BPF • WINDOW COMPARATOR • FOCUS PHASE COMPENSATION DFCT FS1 TM7 TM4 TM3 FS4 FS3 FS2 TG2 TM2 14 SLO 13 SL+ TM6 TM5 • F SET 17 ISET 16 FSET 15 SL– • TRACKING PHASE COMPENSATION 18 SSTOP 12 DVcc EFM FOK ASY MIRR CC2 CC1 36 35 34 33 32 31 30 29 28 27 26 25 • IIL ↓ • TTL RFO 40 • OUTPUT DECODER TZC 42 • FS1 to 4 TE 43 TDFCT 44 DFCT • TG1 to 2 • TM1 to 7 • PS1 to 3 FZC 46 FE 47 FDFCT 48 1 2 3 4 5 6 7 8 9 10 11 FGD FEO TG2 SRCH AVCC TGU TAO FLB FE– VC FS3 –2– TA– CXA1372BQ/BS Pin Configuration CXA1372BQ DGND C. OUT 26 SENS DFCT EFM 36 CB 37 CP 38 RFI 39 RFO 40 DVEE 41 TZC 42 TE 43 TDFCT 44 ATSC 45 FZC 46 FE 47 FDFCT 48 1 35 CC1 34 33 32 31 30 29 28 27 25 24 DATA 23 XLT 22 CLK 21 LOCK 20 DIRC 19 AVEE CXA1372BQ 18 SSTOP 17 ISET 16 FSET 15 SL– 14 SLO 13 SL+ 2 3 4 5 6 7 8 9 10 11 12 FEO AVcc FS3 SRCH FGD TGU CXA1372BS C. OUT DGND TAO FLB FE– TG2 TA– VC XRST DVcc CC2 MIRR FOK ASY SENS DFCT MIRR XRST LOCK DVEE DATA DIRC 26 23 DVcc RFO EFM CC2 CC1 TZC ASY CB 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 CLK RFI CP 30 29 28 27 25 CXA1372BS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 24 FGD FLB FS3 FE– TE SRCH –3– SSTOP FE TDFCT TGU TG2 ATSC FSET TZC AVcc SLO VC SL+ FDFCT ISET TAO FEO TA– SL– AVEE FOK XLT CXA1372BQ/BS Pin Description Pin No. Q S Symbol I/O Equivalent circuit Description Center voltage input. For dual power supplies: GND For single power supply: (VCC + GND)/2 1 7 VC I Vcc 147 48k 130k VEE 2 8 FGD I 2 20µA Connects a capacitor between this pin and Pin 3 to cut high-frequency gain. 46k 580k 3 9 FS3 I 3 The high-frequency gain of the focus servo is switched through FS3 ON and OFF. 4 10 FLB I 40k 4 External time constant to boost the low frequency of the focus servo. 5 11 FEO O 5 Focus drive output. 11 17 TAO O 11 14 250µA 2.5µA Tracking drive output. 14 20 SLO O Sled drive output. 90k 6 12 FE– 147 I 6 40k 2.5µA Inverted input for focus amplifier. –4– CXA1372BQ/BS Pin No. Q S Symbol I/O Equivalent circuit Description 147 7 13 SRCH I 7 50k 3.5µA 11µA External time constant for forming the focus search waveforms. 110k 8 14 20k TGU I 8 82k External time constant for selecting the tracking high-frequency gain. 147 9 15 TG2 I 9 470k External time constant for selecting the tracking high-frequency gain. 90k 12 18 TA– 147 I 12 3µA 11µA Inverted input for tracking amplifier. 10k 13 19 SL+ I 13 Non-inverted input for sled amplifier. 15 21 SL– I 147 15 3µA 22µA Inverted input for sled amplifier. –5– CXA1372BQ/BS Pin No. Q S Symbol I/O Equivalent circuit Description 147 16 22 FSET I 16 15k 15k Sets the peak frequency of focus tracking phase compensation. 147 17 23 ISET I 17 Current is input to determine focus search, track jump, and sled kick level. 7µA 147 18 18 24 SSTOP I Limit SW ON/OFF signal detection for disc innermost track detection. 20 26 DIRC I Used for 1-track jump. Contains a 47kΩ pull-up resistor. At "Low" sled overrun prevention circuit operates. Contains a 47kΩ pull-up resistor. 47k 147 15µA 21 27 LOCK I 20 21 2.


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