CY7C372I

USE ULTRA37000™ FOR ALL NEW DESIGNS CY7C372i UltraLogic™ 64-Macrocell Flash CPLD Features 64 macrocells in four logic blocks 32 I/O pins Five dedicated inputs including two clock pins In-System Reprogrammable (ISR™) Flash technology — JTAG interface Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed — fMAX = 125 MHz — tPD = 10 ns — tS = 5.5 ns — tCO = 6.5 ns Fully PCI compliant 3.3V or 5.0V I/O operation Available in 44-pin PLCC, TQFP, and CLCC packages Pin-compatible with the CY7C371i Functional Description The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. Like all of the UltraLogic™ FLASH370i devices, the CY7C372i is electrically erasable and ISR, which simplifies both design and manufacturing flows, thereby reducing costs. The Cypress ISR function is implemented through a JTAG serial interface. Data is shifted in and out through the SDI and SDO pins. The ISR interface is enabled using the programming voltage pin (ISREN). Additionally, because of the superior routability of the FLASH370i devices, ISR often allows users to change existing logic designs while simultaneously fixing pinout assignments. The 64 macrocells in...