CY7C346

USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C346 128-Macrocell MAX® EPLD Features 128 macrocells in eight logic array blocks (LABs) 20 dedicated inputs, up to 64 bidirectional I/O pins Programmable interconnect array 0.8-micron double-metal CMOS EPROM technology Available in 84-pin CLCC, PLCC, and 100-pin PGA, PQFP The 128 macrocells in the CY7C346 are divided into eight LABs, 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. Each LAB is interconnected through the programmable interconnect array, allowing all signals to be routed throughout the chip. The speed and density of the CY7C346 allow it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 25 times the functionality of 20-pin PLDs, the CY7C346 allows the replacement of over 50 TTL devices. By replacing large amounts of logic, the CY7C346 reduces board space, part count, and increases system reliability. Functional Description The CY7C346 is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device. The MAX® architecture is 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. Logic Block Diagram .. 1 . 78 . 79 80 . 83 . 84 .. 2 .. 5 .. 6 .. 7 (C7) [16] (A10) [9] (B9) [10] (A9) [11] (A8) [14] (B7) [15] (A7) [17] ...