Correlated Double Sampling IC
AN2018S
Correlated Double Sampling IC
s Overview
The AN2018S is used to reduce noise in CCD image sensor output signal. ...
Description
AN2018S
Correlated Double Sampling IC
s Overview
The AN2018S is used to reduce noise in CCD image sensor output signal. It performs correlated doublesampling on image signal sent from a CCD sensor to output clearer image signal.
0.4 0.4±0.25 5.0±0.3
0.3 4.2±0.3 6.5±0.3 8-Pin SOP Package (SOP008-P-0225) Unit:mm
0.1±0.1
1.27
Operating on low voltage (V CC=4.8V), consuming little current (ICC =12.7mA typ.) Including a high-speed sampling circuit responding to 510-830H CCD 6dB or 9dB fixed gain 83-dB high S/N-ratio (at 6dB output)
p s Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 Pin name CDS output (9dB) Blanking pulse input CCD signal input VCC Sampling pulse input (2) Sampling pulse input (1) GND CDS output (6dB)
s Block Diagram
6dB OUT
8
GND
7
SP1
6
SP2
5
+
6dB
+
9dB
–
–
BLK S/H
BIAS 50kΩ
S/H
1
2
3
4
9dB OUT
BLK
SIG.IN
VCC
0.15 0.65
s Features
1.5±0.2
s Absolute Maximum Ratings
Parameter Supply voltage Supply current Power dissipation Operating ambient temperature Note 1) Storage temperature Note 1) Symbol VCC
ICC
Rating 5.5 18 99 –20 to +70 –55 to +125
Unit V mA mW ˚C ˚C
PD Topr Tstg
Note 1) Ta=25˚C except operating ambient temperature and storage temperature.
sRecommended Operating Range (Ta=25˚C)
Parameter Operating supply voltage range Symbol VCC Range 4.5V to 5.1V
s Electrical Characteristics (VCC=4.8V, Ta=25±2˚C)
Parameter Supply current Terminal voltage pin (3) Terminal voltage pin (8) Terminal voltage pin (1) 6dB amp. gain 9dB amp. g...
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