CY28RS400

CY28RS400 Clock Generator for ATI RS400 Chipset Features Supports Intel CPU Selectable CPU frequencies Differential CPU clock pairs 100-MHz differential SRC clocks 48-MHz USB clock 33-MHz PCI clock Low-voltage frequency select input I2C support with readback capabilities Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction 3.3V power supply 56-pin SSOP and TSSOP packages CPU x3 SRC x8 PCI x1 REF x3 USB_48 x1 Block Diagram XIN XOUT CPU_STP# CLKREQ[0:1]# FS_[C:A] VTT_PWRGD# IREF Pin Configuration VDD_REF REF[0:2] XTAL OSC PLL1 PLL Ref Freq Divider Network PD PLL2 SDATA SCLK I2C Logic Xin XOUT VDD_48 VDD_CPU USB_48 CPUT[0:2], CPUC[0:2], VSS_48 VDD_SRC VTT_PWRGD#/PD SRCT[0:5],SRCC[0:5] SCLK SDATA VDD_SRCS SRCST[0:1],SRCSC[0:1] FSC CLKREQ#0 VDD_PCI CLKREQ#1 PCI SRCT5 SRCC5 VDD_SRC VSS_SRC VDD_48 MHz SRCT4 SRCC4 SRCT3 USB_48 SRCC3 VSS_SRC VDD_SRC SRCT2 SRCC2 SRCT1 SRCC1 VSS_SRC SRCST1 SRCSC1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VDD_REF VSS_REF REF0/FSA REF1/FSB REF2 VDD_PCI PCI0/409_410 VSS_PCI CPU_STOP# CPUT0 CPUC0 VDD_CPU VSS_CPU CPUT1 CPUC1 CPUT2 CPUC2 VDDA VSSA IREF VSS_SRC1 VDD_SRC1 SRCT0 SRCC0 VDD_SRCS VSS_SRCS SRCST0 SRCSC0 56 SSOP/TSSOP Cypress Semiconductor Corporation Document #: 38-07637 Rev. *B 3901 North First Street San Jose, CA 95134 408-943-2600 Revised Oct...