HS9-54C138RH

HS-54C138RH February 1996 Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A 1 B 2 C 3 G2A 4 G2B 5 G1 6 Y7 7 GND 8 16 VDD 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features Devices QML Qualified in Accordance With MIL-PRF-38535 Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95825 and Intersil’ QM Plan Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD (Si) - Latch-Up Immune > 1 x 1012 RAD (Si)/s Multiple Input Enable for Easy Expansion Single Power Supply +5V Outputs Active Low Low Standby Power (0.5mW Max at +5V) High Noise Immunity Equivalent to Sandia SA2995 Bus Compatible with Intersil Rad-Hard 80C85RH Full Military Temperature Range -55oC to +125oC Description The Intersil HS-54C138RH is a radiation hardened 3- to 8-line decoder fabricated using a radiation hardened EPI-CMOS process. It features low power consumption, high noise immunity, and high speed. Also featured are pin and function compatibility with the 54LS138 industry standard part. The HS-54C138RH is ideally suited for high speed memory chip select address decoding. It is intended for use with the Intersil HS-80C85RH radiation hardened microprocessor, but it can also be utilized as a demultiplexer in any low power rad-hard application. The HS-54C138RH contains a one of eight binary decoder. A three bit binary input is used to select and activate each of th...