HV51V7403HGL-5

HY51V(S)17403HG/HGL 4M x 4Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit. HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)17403HG/HGL to be packaged in standard 300mil 24(26)pin SOJ and 24(26) pin TSOP-II. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply 3.3V +/- 0.3V tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. FEATURES Extended Data Out Mode capability Read-modify-write capability Multi-bit parallel test capability TTL(3.3V) compatible inputs and outputs /RAS only, CAS-before-/RAS, Hidden and self refresh(L-version) capability Fast access time and cycle time Part No HY51V(S)17403HG/HGL-5 HY51V(S)17403HG/HGL-6 HY51V(S)17403HG/HGL-7 tRAC 50ns 60ns 70ns JEDEC standard pinout 24(26)pin plastic SOJ / 24(26)pin TSOP-II Single power supply of 3.3V +/- 0.3V Battery back up operation(L-version) tCAC 13ns 15ns 18ns tRC 84ns 104ns 124ns tHPC 20ns 25ns 30ns Power dissipation 50ns Active Standby 432mW 60ns 369mW 70ns 360mW Refresh cycle Part No HY51V17403HG HY51V1...