HYB3166160AT-50

4M x 16-Bit Dynamic RAM ( 8k, 4k & 2k Refresh) HYB 3164160AT(L) -40/-50/-60 HYB 3165160AT(L) -40/-50/-60 HYB 3166160AT(L) -40/-50/-60 Advanced Information 4 194 304 words by 16-bit organization 0 to 70 °C operating temperature Fast Page Mode operation Performance: -40 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/write cycle time Fast page mode cycle time 40 10 20 75 30 -50 50 13 25 90 35 -60 60 15 30 110 40 ns ns ns ns ns Single + 3.3 V (± 0.3V) power supply Low power dissipation: -40 HYB3166160AT(L) HYB3165160AT(L) HYB3164160AT(L) 900 756 612 -50 558 468 378 -60 396 324 270 mW mW mW 7.2 mW standby (TTL) 3.24 mW standby (MOS) 720 µW standby for L-version Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh and self refresh (L-version only) 2 CAS / 1 WE byte control 8192 refresh cycles /128 ms , 13 R/ 9C addresses (HYB 3164160AT) 4096 refresh cycles / 64 ms , 12 R/ 10C addresses (HYB 3165160AT) 2048 refresh cycles / 32 ms , 11 R/ 11C addresses (HYB 3166160AT) 256 msec refresh period for L-versions Plastic Package: P-TSOPII-50 400 mil Semiconductor Group 1 6.97 HYB3164(5/6)160AT(L)-40/-50/-60 4M x 16-DRAM This device is a 64 MBit dynamic RAM organized 4 194 304 by 16 bits. The device is fabricated on an advanced second generation 64Mbit 0,35µm-CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low...