HYB3164805T-60

8M x 8-Bit Dynamic RAM (4k & 8k Refresh, EDO-version) HYB 3164805J/T(L) -50/-60 HYB 3165805J/T(L) -50/-60 Preliminary Information 8 388 608 words by 8-bit organization 0 to 70 ˚C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 60 ns (-60 version) Cycle time: 84 ns (-50 version) 104 ns (-60 version) CAS access time: 13 ns ( -50 version) 15 ns ( -60 version) Hyper page mode (EDO) cycle time 20 ns (-50 version) 25 ns (-60 version) Single + 3.3 V (± 0.3V) power supply Low power dissipation max. 396 active mW ( HYB 3164805J/T(L)-50) max. 360 active mW ( HYB 3164805J/T(L)-60) max. 504 active mW ( HYB 3165805J/T(L)-50) max. 432 active mW ( HYB 3165805J/T(L)-60) 7.2 mW standby (TTL) 720 W standby (MOS) 14.4 mW Self Refresh (L-version only) Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh and self refresh modes Hyper page mode (EDO) capability 8192 refresh cycles/128 ms , 13 R/ 11C addresses (HYB 3164805J/T(L)) 4096 refresh cycles/ 64 ms , 12 R/ 12C addresses (HYB 3165805J/T(L)) Plastic Package: P-SOJ-34-1 500 mil HYB 3164(5)805J P-TSOPII-34-1 500 mil HYB 3164(5)805T(L) Semiconductor Group 149 HYB3164(5)805J/T(L)-50/-60 8M x 8 EDO-DRAM This HYB3164(5)805 is a 64 MBit dynamic RAM organized 8 388 608 x 8 bits. The device is fabricated in SIEMENS/IBM most advanced first generation 64Mbit CMOS silicon gate process technology. The circuit and process design allow this device ...