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HYB3164400T-60 Dataheets PDF



Part Number HYB3164400T-60
Manufacturers Siemens Semiconductor Group
Logo Siemens Semiconductor Group
Description 16M x 4-Bit Dynamic RAM
Datasheet HYB3164400T-60 DatasheetHYB3164400T-60 Datasheet (PDF)

16M x 4-Bit Dynamic RAM (4k & 8k Refresh) HYB 3164400J/T -50/-60 HYB 3165400J/T -50/-60 Preliminary Information • • • • • • • • • • • 16 777 216 words by 4-bit organization 0 to 70 ˚C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 60 ns (-60 version) Cycle time: 90 ns (-50 version) 110 ns (-60 version) CAS access time: 13 ns ( -50 version) 15 ns ( -60 version) Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) Single + 3.3 V (± 0.3V) po.

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16M x 4-Bit Dynamic RAM (4k & 8k Refresh) HYB 3164400J/T -50/-60 HYB 3165400J/T -50/-60 Preliminary Information • • • • • • • • • • • 16 777 216 words by 4-bit organization 0 to 70 ˚C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 60 ns (-60 version) Cycle time: 90 ns (-50 version) 110 ns (-60 version) CAS access time: 13 ns ( -50 version) 15 ns ( -60 version) Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) Single + 3.3 V (± 0.3V) power supply Low power dissipation max. 396 active mW ( HYB 3164400J/T-50) max. 360 active mW ( HYB 3164400J/T-60) max. 504 active mW ( HYB 3165400J/T-50) max. 432 active mW ( HYB 3165400J/T-60) 7.2 mW standby (TTL) 720 W standby (MOS) Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh and self refresh modes Fast page mode capability 8192 refresh cycles/128 ms , 13 R/ 11C addresses (HYB 3164400J/T) 4096 refresh cycles/ 64 ms , 12 R/ 12C addresses (HYB 3165400J/T) Plastic Package: P-SOJ-34-1 500 mil HYB 3164(5)400J P-TSOPII-34-1 500 mil HYB 3164(5)400T Semiconductor Group 61 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM This device is a 64 MBit dynamic RAM organized 16 777 216 by 4 bits. The device is fabricated in SIEMENS/IBM most advanced first generation 64Mbit CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low power dissipation. This DRAM operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)400J/T to be packaged in a 500mil wide SOJ-34 or TSOP-34 plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment. Ordering Information Type HYB 3164400J-50 HYB 3164400J-60 HYB 3164400T-50 HYB 3164400T-60 HYB 3165400J-50 HYB 3165400J-60 HYB 3165400T-50 HYB 3165400T-60 Pin Names A0-A12 A0-A11 RAS OE I/O1-I/O4 CAS WRITE Vcc Vss Address Inputs for HYB 3164400J/T Address Inputs for HYB 3165400J/T Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply ( + 3.3V) Ground Ordering Code on request on request on request on request on request on request on request on request Package P-SOJ-34-1 P-SOJ-34-1 P-TSOPII-34-1 P-TSOPII-34-1 P-SOJ-34-1 P-SOJ-34-1 P-TSOPII-34-1 P-TSOPII-34-1 Descriptions 500 mil DRAM (access time 50 ns) 500 mil DRAM (access time 60 ns) 500 mil DRAM (access time 50 ns) 500 mil DRAM (access time 60 ns) 500 mil DRAM (access time 50 ns) 500 mil DRAM (access time 60 ns) 500 mil DRAM (access time 50 ns) 500 mil DRAM (access time 60 ns) Semiconductor Group 62 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM P-SOJ-34-1 (500 mil) P-TSOPII-34-1 (500 mil) Pin Configuration Semiconductor Group 63 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM TRUTH TABLE FUNCTION Standby Read Early-Write Delayed-Write Read-Modify-Write Fast Page Mode Read 1st Cycle 2nd Cycle Fast Page Mode Early Write 1st Cycle 2nd Cycle Fast Page Mode RMW 1st Cycle 2st Cycle RAS only refresh CAS-before-RAS refresh Test Mode Entry Hidden Refresh READ WRITE RAS H L L L L L L L L L L L H-L H-L L-H-L L-H-L CAS H-X L L L L H-L H-L H-L H-L H-L H-L H L L L L WRITE X H L H-L H-L H H L L H-L H-L X H L H L OE X L X H L-H L L X X L-H L-H X X X L X ROW ADDR X ROW ROW ROW ROW ROW n/a ROW n/a ROW n/a ROW X X ROW ROW COL ADDR X COL COL COL COL COL COL COL COL COL COL n/a n/a n/a COL COL I/O1I/O4 High Impedance Data Out Data In Data In Data Out, Data In Data Out Data Out Data In Data In Data Out, Data In Data Out, Data In High Impedance High Impedance High Impedance Data Out Data In Semiconductor Group 64 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM Block Diagram for HYB 3164400J/T Semiconductor Group 65 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM Block Diagram for HYB 3165400J/T Semiconductor Group 66 HYB 3164(5)400J/T-50/-60 16M x 4-DRAM Absolute Maximum Ratings Operating temperature range..............................................................................................0 to 70 ˚C Storage temperature range.........................................................................................– 55 to 150 ˚C Input/output voltage..................................................................................-0.5 to min (Vcc+0.5,4.6) V Power supply voltage....................................................................................................-0.5V to 4.6 V Power dissipation......................................................................................................................1.0 W Data out current (short circuit)..................................................................................................50 mA Note Stresses above those listed under „Absolute Maximum Ratings“ may cause permanent damage of the device. Exposure to absolute maximum rating conditions for extended periods may effect device r.


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