HYB3118165BSJ-50

1M × 16-Bit Dynamic RAM 1k Refresh (Hyper Page Mode-EDO) Advanced Information 1 048 576 words by 16-bit organization 0 to 70 °C operating temperature Hyper Page Mode-EDO-operation Performance: -50 -60 60 15 30 HYB 5118165BSJ/BST-50/-60 HYB 3118165BSJ/BST-50/-60 tRAC RAS access time tCAC CAS access time tAA tRC Access time from address Read/Write cycle time 50 13 25 84 20 ns ns ns ns ns 104 25 tHPC Hyper page mode (EDO) cycle time Power Dissipation, Refresh & Addressing: HYB5118165 -50 Power Supply Addressing Refresh Active TTL Standby CMOS Standby 715 11 5.5 10/10 632 -60 5 V ± 10 % HYB3118165 -50 10/10 468 7.2 3.6 414 mW mW mW -60 3.3 V ± 0.3 V 1024 cycles / 16 ms Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh and hidden refresh All inputs, outputs and clocks fully TTL (5 V versions) and LV-TTL (3.3 V version)-compatible Plastic Package: P-SOJ-42-1 400 mil P-TSOPII-50/44-1 400 mil Semiconductor Group 1 1998-10-01 HYB 5118165BSJ/BST-50/-60 HYB 3118165BSJ/BST-50/-60 1M × 16 EDO-DRAM The HYB 5(3)118165 are 16 MBit dynamic RAMs based on die revisions “G” & “F” and organized as 1 048 576 words by 16-bits. The HYB 5(3)118165 utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5(3)18165 to be packaged in a standard SOJ-42 and TSOPII-50/44 plastic package with 400 mil...