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ADC0803 Dataheets PDF



Part Number ADC0803
Manufacturers NXP
Logo NXP
Description CMOS 8-bit A/D converters
Datasheet ADC0803 DatasheetADC0803 Datasheet (PDF)

INTEGRATED CIRCUITS ADC0803/0804 CMOS 8-bit A/D converters Product data Supersedes data of 2001 Aug 03 2002 Oct 17 Philips Semiconductors Philips Semiconductors Product data CMOS 8-bit A/D converters ADC0803/0804 DESCRIPTION The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimu.

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INTEGRATED CIRCUITS ADC0803/0804 CMOS 8-bit A/D converters Product data Supersedes data of 2001 Aug 03 2002 Oct 17 Philips Semiconductors Philips Semiconductors Product data CMOS 8-bit A/D converters ADC0803/0804 DESCRIPTION The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimum of external circuitry. The 3-State output data lines can be connected directly to the data bus. The differential analog voltage input allows for increased common-mode rejection and provides a means to adjust the zero-scale offset. Additionally, the voltage reference input provides a means of encoding small analog voltages to the full 8 bits of resolution. PIN CONFIGURATION D, N PACKAGES CS 1 RD 2 WR 3 CLK IN 4 20 VCC 19 CLK R 18 D0 17 D1 16 D2 15 D3 14 D4 13 D5 12 D6 11 D7 TOP VIEW INTR 5 VIN(+) 6 VIN(–) 7 A GND 8 FEATURES VREF/2 9 D GND 10 • Compatible with most microprocessors • Differential inputs • 3-State outputs • Logic levels TTL and MOS compatible • Can be used with internal or external clock • Analog input range 0 V to VCC • Single 5 V supply • Guaranteed specification with 1 MHz clock SL00016 Figure 1. Pin configuration APPLICATIONS • Transducer-to-microprocessor interface • Digital thermometer • Digitally-controlled thermostat • Microprocessor-based monitoring and control systems ORDERING INFORMATION DESCRIPTION 20-pin plastic small outline (SO) package 20-pin plastic small outline (SO) package 20-pin plastic dual in-line package (DIP) 20-pin plastic dual in-line package (DIP) TEMPERATURE RANGE 0 to 70 °C –40 to 85 °C 0 to 70 °C –40 to +85 °C ORDER CODE ADC0803CD, ADC0804CD ADC0803LCD, ADC0804LCD ADC0803CN, ADC0804CN ADC0803LCN, ADC0804LCN TOPSIDE MARKING ADC0803-1CD, ADC0804-1CD ADC0803-1LCD, ADC0804-1LCD ADC0803-1CN, ADC0804-1CN ADC0803-1LCN, ADC0804-1LCN DWG # SOT163-1 SOT163-1 SOT146-1 SOT146-1 ABSOLUTE MAXIMUM RATINGS SYMBOL VCC Supply voltage Logic control input voltages All other input voltages Tamb Operating temperature range ADC0803LCD/ADC0804LCD ADC0803LCN/ADC0804LCN ADC0803CD/ADC0804CD ADC0803CN/ADC0804CN Storage temperature Lead soldering temperature (10 seconds) Maximum power N package D package dissipation1 Tamb = 25 °C (still air) 1690 1390 mW mW PARAMETER CONDITIONS RATING 6.5 –0.3 to +16 –0.3 to (VCC +0.3) –40 to +85 –40 to +85 0 to +70 0 to +70 –65 to +150 230 UNIT V V V °C °C °C °C °C °C Tstg Tsld PD NOTE: 1. Derate above 25 °C, at the following rates: N package at 13.5 mW/°C; D package at 11.1 mW/°C. 2002 Oct 17 2 Philips Semiconductors Product data CMOS 8-bit A/D converters ADC0803/0804 BLOCK DIAGRAM VIN (+) 6 VIN (–) 7 M + – + 9 VREF/2 LADDER AND DECODER 8 A GND AUTO ZERO COMPARATOR – VCC 20 D7 (MSB) (11) D6 D5 D4 D3 D2 D1 D0 (LSB) (12) (13) (14) (15) (16) (17) (18) OUTPUT LATCHES SAR 10 D GND LE OE 3 WR 8–BIT SHIFT REGISTER CLOCK 1 CS S INTR FF R 2 RD Q 5 INTR 4 CLK IN 19 CLK R SL00017 Figure 2. Block diagram 2002 Oct 17 3 Philips Semiconductors Product data CMOS 8-bit A/D converters ADC0803/0804 DC ELECTRICAL CHARACTERISTICS VCC = 5.0 V, fCLK = 1 MHz, Tmin ≤ Tamb ≤ Tmax, unless otherwise specified. LIMITS SYMBOL PARAMETER ADC0803 relative accuracy error (adjusted) ADC0804 relative accuracy error (unadjusted) RIN VREF/2 input resistance3 Analog input voltage range3 Over analog input voltage range VCC = 5V ±10%1 VCC = 5.25 VDC VCC = 4.75 VDC VIN = 5 VDC VIN = 0 VDC –1 0.005 –0.005 2.0 DC common-mode error Power supply sensitivity Control inputs VIH VIL IIH IIL VT+ VT– VH VOL VOH VOL Logical “1” input voltage Logical “0” input voltage Logical “1” input current Logical “0” input current 15 0.8 1 VDC VDC µADC µADC 3.5 2.1 2.0 0.4 2.4 VDC VDC VDC VDC VDC TEST CONDITIONS Full-Scale adjusted VREF/2 = 2.500 VDC VCC = 0 V2 400 –0.05 1/16 1/16 680 VCC+0.05 1/8 Min Typ Max 0.50 1 UNIT LSB LSB Ω V LSB LSB Clock in and clock R Clock in positive-going threshold voltage Clock in negative-going threshold voltage Clock in hysteresis (VT+)–(VT–) Logical “0” clock R output voltage Logical “1” clock R output voltage IOL = 360 µA, VCC = 4.75 VDC IOH = –360 µA, VCC = 4.75 VDC 2.7 1.5 0.6 3.1 1.8 1.3 Data output and INTR Logical “0” output voltage Data outputs INTR outputs VOH O IOZL IOZH ISC ISC ICC Logical “1” output voltage 3-State output leakage 3-State output leakage +Output short-circuit current –Output short-circuit current Power supply current IOL = 1.6 mA, VCC = 4.75 VDC IOL = 1.0 mA, VCC = 4.75 VDC IOH = –360 µA, VCC = 4.75 VDC IOH = –10 µA, VCC = 4.75 VDC VOUT = 0 VDC, CS = logical “1” VOUT = 5 VDC, CS = logical “1” VOUT = 0 V, Tamb = 25 °C VOUT = VCC, Tamb = 25 °C fCLK = 1 MHz, VREF/2 = OPEN, CS = Logical “1”, Tamb = 25 °C 4.5 9.0 12 30 3.0 3.5 2.4 4.5 –3 3 VDC C µADC µADC mADC mADC mA 0.4 0.4 VDC VDC NOTES: 1. Analog inputs must remain within th.


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