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AD9814 Dataheets PDF



Part Number AD9814
Manufacturers Analog Devices
Logo Analog Devices
Description Complete 14-Bit CCD/CIS Signal Processor
Datasheet AD9814 DatasheetAD9814 Datasheet (PDF)

a FEATURES 14-Bit 10 MSPS A/D Converter No Missing Codes Guaranteed 3-Channel Operation Up to 10 MSPS 1-Channel Operation Up to 7 MSPS Correlated Double Sampling 1-6x Programmable Gain ؎ 300 mV Programmable Offset Input Clamp Circuitry Internal Voltage Reference Multiplexed Byte-Wide Output (8+6 Format) 3-Wire Serial Digital Interface +3/+5 V Digital I/O Compatibility 28-Lead SOIC Package Low Power CMOS: 330 mW (Typ) Power-Down Mode: <1 mW APPLICATIONS Flatbed Document Scanners Film Scanners Dig.

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a FEATURES 14-Bit 10 MSPS A/D Converter No Missing Codes Guaranteed 3-Channel Operation Up to 10 MSPS 1-Channel Operation Up to 7 MSPS Correlated Double Sampling 1-6x Programmable Gain ؎ 300 mV Programmable Offset Input Clamp Circuitry Internal Voltage Reference Multiplexed Byte-Wide Output (8+6 Format) 3-Wire Serial Digital Interface +3/+5 V Digital I/O Compatibility 28-Lead SOIC Package Low Power CMOS: 330 mW (Typ) Power-Down Mode: <1 mW APPLICATIONS Flatbed Document Scanners Film Scanners Digital Color Copiers Multifunction Peripherals Complete 14-Bit CCD/CIS Signal Processor AD9814 PRODUCT DESCRIPTION The AD9814 is a complete analog signal processor for CCD imaging applications. It features a 3-channel architecture designed to sample and condition the outputs of trilinear color CCD arrays. Each channel consists of an input clamp, Correlated Double Sampler (CDS), offset DAC and Programmable Gain Amplifier (PGA), multiplexed to a high performance 14bit A/D converter. The CDS amplifiers may be disabled for use with sensors such as Contact Image Sensors (CIS) and CMOS active pixel sensors, which do not require CDS. The 14-bit digital output is multiplexed into an 8-bit output word that is accessed using two read cycles. The internal registers are programmed through a 3-wire serial interface, and provide adjustment of the gain, offset, and operating mode. The AD9814 operates from a single +5 V power supply, typically consumes 330 mW of power, and is packaged in a 28-lead SOIC. FUNCTIONAL BLOCK DIAGRAM AVDD AVSS CML CAPT CAPB AVDD AVSS DRVDD DRVSS VINR CDS PGA BANDGAP REFERENCE AD9814 OEB 9-BIT DAC VING CDS PGA 3:1 MUX 14-BIT ADC 14 14:8 MUX 8 DOUT 9-BIT DAC CONFIGURATION REGISTER MUX REGISTER 6 RED GREEN BLUE RED GREEN BLUE DIGITAL CONTROL INTERFACE GAIN REGISTERS VINB CDS PGA SCLK SLOAD SDATA 9-BIT DAC INPUT CLAMP BIAS OFFSET 9 OFFSET REGISTERS CDSCLK1 CDSCLK2 ADCCLK REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 AD9814–SPECIFICATIONS (TMIN to TMAX, AVDD = +5 V, DRVDD = +5 V, 3-Channel CDS Mode, fADCCLK = 6 MHz, fCDSCLK1 = fCDSCLK2 = 2 MHz, PGA Gain = 1, Input Range = 4 V, unless otherwise noted.) Parameter CONVERSION RATE 3-Channel Mode with CDS 1-Channel Mode with CDS ACCURACY (Entire Signal Path) ADC Resolution Integral Nonlinearity 1 (INL) INL @ 10 MHz Differential Nonlinearity (DNL) DNL @ 10 MHz No Missing Codes Guaranteed Offset Error Gain Error2 ANALOG INPUTS Input Signal Range3 Allowable Reset Transient3 Input Limits4 Input Cap.


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