AD9773

12-Bit, 160 MSPS, 2×/4×/8× Interpolating Dual TxDAC D/A Converter AD9773 FEATURES 12-bit resolution, 160 MSPS/400 MSPS input/output data rate Selectable 2×/4×/8× interpolating filter Programmable channel gain and offset adjustment fS/2, fS/4, fS/8 digital quadrature modulation capability Direct IF transmission mode for 70 MHz + IFs Enables image rejection architecture Fully compatible SPI port Excellent ac performance SFDR −69 dBc @ 2 MHz to 35 MHz WCDMA ACPR −69 dB @ IF = 19.2 MHz Internal PLL clock multiplier Selectable internal clock divider Versatile clock input Differential/single-ended sine wave or TTL/CMOS/LVPECL compatible Versatile input data interface Twos complement/straight binary data coding Dual-port or single-port interleaved input data Single 3.3 V supply operation Power dissipation: typical 1.2 W @ 3.3 V On-chip 1.2 V reference 80-lead thin quad flat package, exposed pad (TQFP_EP) APPLICATIONS Communications Analog quadrature modulation architecture 3G, multicarrier GSM, TDMA, CDMA systems Broadband wireless, point-to-point microwave radios Instrumentation/ATE FUNCTIONAL BLOCK DIAGRAM VREF IOFFSET AD9773 12 I AND Q NONINTERLEAVED OR INTERLEAVED DATA 12 DATA ASSEMBLER HALFBAND FILTER1* I 16 LATCH 16 HALF- HALF- BAND BAND FILTER2* FILTER3* 16 16 Q 16 LATCH 16 16 16 COS SIN fDAC/2, 4, 8 SIN IMAGE REJECTION/ DUAL DAC MODE BYPASS MUX WRITE SELECT MUX CONTROL CLOCK OUT /2 SPI INTERFACE AND CONTROL REGISTERS /2 /2 * HALF-BAND FILTERS ALS...