Document
Features
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Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) 10 MHz Clock Rate 128-Byte Page Mode Only for Write Operations Low-Voltage and Standard-Voltage Operation – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 3.6V) Block Write Protection – Protect 1/4, 1/2, or Entire Array Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection High Reliability – Endurance: 100K Write Cycles – Data Retention: > 40 Years – ESD Protection: > 3000V 8-Pin PDIP, 8-Pin EIAJ SOIC, and 8-Pin Leadless Array Package
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SPI Serial EEPROMs
256K (32,768 x 8) 512K (65,536 x 8)
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Description
The AT25HP256/512 provides 262,144/524,288 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 32,768/65,536 words of 8-bits each. The device is optimized for use in many industrial and commercial applications where high-speed, low-power, and low-voltage operation are essential. The AT25HP256/512 is available in a space saving 8-pin PDIP (AT25HP256/512), 8-pin EIAJ SOIC (AT25HP256), and 8-pin Leadless Array (AT25HP256/512) packages. In (continued)
AT25HP256 AT25HP512 Preliminary
Pin Configurations
Pin Name CS SCK SI SO GND VCC WP HOLD Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Write Protect Suspends Serial Input
8-Pin PDIP
CS SO WP GND 1 2 3 4 8 7 6 5 VCC HOLD SCK SI CS SO WP GND
8-Pin SOIC
1 2 3 4 8 7 6 5 VCC HOLD SCK SI
8-Pin Leadless Array
VCC HOLD SCK SI 8 7 6 5 1 2 3 4 CS SO WP GND
Rev. 1113B–07/98
Bottom View
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addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), and 1.8V (1.8V to 3.6V) versions. The AT25HP256/512 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely selftimed, and no separate ERASE cycle is required before WRITE. BLOCK WRITE protection is enabled by programming the status register with top ¼, top ½ or entire array of write protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... -1.0V to +7.0V Maximum Operating Voltage........................................... 6.25V DC Output Current ........................................................ 5.0 mA *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage .