ACS280MS

ACS280MS January 1996 Radiation Hardened 9-Bit Odd/ Even Parity Generator Checker Pinouts 14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T14, LEAD FINISH C TOP VIEW I6 1 I7 2 NC 3 I8 4 EVEN 5 ODD 6 GND 7 14 VCC 13 I5 12 I4 11 I3 10 I2 9 I1 8 I0 Features Devices QML Qualified in Accordance with MIL-PRF-38535 Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96708 and Intersil’ QM Plan 1.25 Micron Radiation Hardened SOS CMOS Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day (Typ) SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC Significant Power Reduction Compared to ALSTTL Logic DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min Input Current ≤ 1µA at VOL, VOH Fast Propagation Delay . . . . . . . . . . . . . . . . 23ns (Max), 15ns (Typ) 14 PIN CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR, CDFP3-F14 LEAD FINISH C TOP VIEW I6 I7 NC I8 EVEN ODD GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC I5 I4 I3 I2 I1 I0 Description The Intersil ACS280M...