Two 8-Bit DACs in One Package
8-Pin DIP/SOIC and microSOIC Packages
+2.7 V to +5.5 V Operation
Internal & External Reference Capability
Individual DAC Power-Down Function
Three-Wire Serial Interface
QSPI™, SPI™ and Microwire™ Compatible
On-Chip Output Buffer
On-Chip Control Register
Low Power Operation: 2.3 mA @ 3.3 V
Full Power-Down to 1 A max, typically 80 nA
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
+2.7 V to +5.5 V, Serial Input, Dual
Voltage Output 8-Bit DAC
FUNCTIONAL BLOCK DIAGRAM
I DAC A I/V
I DAC B I/V
16-BIT SHIFT REGISTER
The AD7303 is a dual, 8-bit voltage out DAC that operates
from a single +2.7 V to +5.5 V supply. Its on-chip precision out-
put buffers allow the DAC outputs to swing rail to rail. This de-
vice uses a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz, and is compatible with QSPI, SPI, microwire
and digital signal processor interface standards. The serial input
register is sixteen bits wide; 8 bits act as data bits for the DACs,
and the remaining eight bits make up a control register.
The on-chip control register is used to address the relevant
DAC, to power down the complete device or an individual
DAC, to select internal or external reference and to provide a
synchronous loading facility for simultaneous update of the
DAC outputs with a software LDAC function.
The low power consumption of this part makes it ideally suited
to portable battery operated equipment. The power consump-
tion is 7.5 mW max at 3 V, reducing to less than 3 µW in full
The AD7303 is available in an 8-pin plastic dual in-line pack-
age, 8-lead SOIC and microSOIC packages.
QSPI and SPI are trademarks of Motorola.
Microwire is a trademark of National Semiconductor.
1. Low power, single supply operation. This part operates from
a single +2.7 V to +5.5 V supply and consumes typically
15 mW at 5.5 V, making it ideal for battery powered
2. The on-chip output buffer amplifiers allow the outputs of the
DACs to swing rail to rail with a settling time of typically 1.2 µs.
3. Internal or external reference capability.
4. High speed serial interface with clock rates up to 30 MHz.
5. Individual power-down of each DAC provided. When com-
pletely powered down, the DAC consumes typically 80 nA.
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 1997