AD608

Low Power Mixer/Limiter/RSSI 3 V Receiver IF Subsystem AD608 FEATURES Mixer −15 dBm, 1 dB compression point −5 dBm IP3 24 dB conversion gain >500 MHz input bandwidth Logarithmic/limiting amplifier 80 dB RSSI range ±3° phase stability over 80 dB range Low power 21 mW at 3 V power consumption CMOS-compatible power-down to 300 μW typical 200 ns enable/disable time APPLICATIONS PHS, GSM, TDMA, FM, or PM receivers Battery-powered instrumentation Base station RSSI measurements GENERAL DESCRIPTION The AD608 provides a low power, low distortion, low noise mixer as well as a complete, monolithic logarithmic/limiting amplifier that uses a successive-detection technique. In addition, the AD608 provides both a high speed received signal strength indicator (RSSI) output with 80 dB dynamic range and a hard-limited output. The RSSI output is from a two-pole postdemodulation low-pass filter and provides a loadable output voltage of 0.2 V to 1.8 V. The AD608 operates from a single 2.7 V to 5.5 V supply at a typical power level of 21 mW at 3 V. The RF and local oscillator (LO) bandwidths both exceed 500 MHz. In a typical IF application, the AD608 can accept the output of a 240 MHz surface acoustic wave (SAW) filter and downconvert it to a nominal 10.7 MHz IF with a conversion gain of 24 dB (ZIF = 165 Ω). The AD608 logarithmic/limiting amplifier section handles any IF from low frequency (LF) up to 30 MHz. The mixer is a doubly balanced gilbert-cell mixer and operates linearly for RF inputs sp...