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AD7723 Dataheets PDF



Part Number AD7723
Manufacturers Analog Devices
Logo Analog Devices
Description 16-Bit 1.2 MSPS CMOS Sigma-Delta ADC
Datasheet AD7723 DatasheetAD7723 Datasheet (PDF)

a FEATURES 16-Bit Sigma-Delta ADC 1.2 MSPS Output Word Rate 32/16 ؋ Oversampling Ratio Low-Pass and Band-Pass Digital Filter Linear Phase On-Chip 2.5 V Voltage Reference Standby Mode Flexible Parallel or Serial Interface Crystal Oscillator Single +5 V Supply AVDD AGND VIN(+) VIN(–) 16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC AD7723 FUNCTIONAL BLOCK DIAGRAM AD7723 2.5V REFERENCE REF2 REF1 DVDD DGND MODULATOR FIR FILTER UNI HALF_PWR STBY MODE 1 MODE 2 SYNC DVDD / CS CFMT/ RD DGND/ DRDY DGND/DB0 XT.

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a FEATURES 16-Bit Sigma-Delta ADC 1.2 MSPS Output Word Rate 32/16 ؋ Oversampling Ratio Low-Pass and Band-Pass Digital Filter Linear Phase On-Chip 2.5 V Voltage Reference Standby Mode Flexible Parallel or Serial Interface Crystal Oscillator Single +5 V Supply AVDD AGND VIN(+) VIN(–) 16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC AD7723 FUNCTIONAL BLOCK DIAGRAM AD7723 2.5V REFERENCE REF2 REF1 DVDD DGND MODULATOR FIR FILTER UNI HALF_PWR STBY MODE 1 MODE 2 SYNC DVDD / CS CFMT/ RD DGND/ DRDY DGND/DB0 XTAL CLOCK XTAL_OFF XTAL CLKIN DGND/DB15 DGND/DB14 SCR/DB13 SLDR/DB12 SLP/DB11 TSI/DB10 FSO/DB9 CONTROL LOGIC DGND/ DGND/ DGND/ DOE/ SFMT/ FSI/ SCO/ SDO/ DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 GENERAL DESCRIPTION The AD7723 is a complete 16-bit, sigma-delta ADC. The part operates from a +5␣ V supply. The analog input is continuously sampled, eliminating the need for an external sample-and-hold. The modulator output is processed by a finite impulse response (FIR) digital filter. The on-chip filtering combined with a high oversampling ratio reduces the external antialias requirements to first order in most cases. The digital filter frequency response can be programmed to be either low pass or band pass. The AD7723 provides 16-bit performance for input bandwidths up to 460␣ kHz at an output word rate up to 1.2 MHz. The sample rate, filter corner frequencies and output word rate are set by the crystal oscillator or external clock frequency. Data can be read from the device in either serial or parallel format. A stereo mode allows data from two devices to share a single serial data line. All interface modes offer easy, high speed connections to modern digital signal processors. The part provides an on-chip 2.5␣ V reference. Alternatively, an external reference can be used. A power-down mode reduces the idle power consumption to 200 µW. The AD7723 is available in a 44-lead PQFP package and is specified over the industrial temperature range from –40°C to +85°C. Two input modes are provided, allowing both unipolar and bipolar input ranges. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 AD7723–SPECIFICATIONS1 f Parameter DYNAMIC SPECIFICATIONS2, 3 Decimate by 32 Bipolar Mode Signal to Noise Full Power Half Power Total Harmonic Distortion4 Spurious Free Dynamic Range4 Unipolar Mode Signal to Noise Total Harmonic Distortion4 Spurious Free Dynamic Range4 Bandpass Filter Mode Bipolar Mode Signal to Noise Decimate by 16 Bipolar Mode Signal to Noise (AVDD = DVDD = +5 V ؎ 5%; AGND = AGND1 = AGND2 = DGND = 0 V; CLKIN = 19.2 MHz; REF2 = 2.5 V; TA = TMIN to TMAX ; unless otherwise noted) Min B Version Typ Max Units Test Conditions/Comments HALF_PWR = 0 or 1 fCLKIN = 10 MHz When HALF-PWR = 1 2.5 V Reference 3 V Reference 87 88.5 86.5 90 91 89 –96 2.5 V Reference 3 V Reference 87 –89 –90 –90 –92 –90 dB dB dB dB dB dB dB dB dB 76 79 dB Signal to Noise Total Harmonic Distortion4 Spurious Free Dynamic Range4 Unipolar Mode Signal to Noise Signal to Noise Total Harmonic Distortion4 Measurement Bandwidth = 0.383 × FO 2.5 V Reference 3 V Reference Measurement Bandwidth = 0.5 × FO 2.5 V Reference 3 V Reference 2.5 V Reference 3 V Reference Measurement Bandwidth = 0.383 × FO Measurement Bandwidth = 0.5 × FO 82 83 78 86 87 81.5 –88 –86 –90 –88 84 81 –89 dB dB dB dB dB dB dB dB dB dB DIGITAL FILTER RESPONSE Low Pass Decimate by 32 0 kHz to fCLKIN /83.5 fCLKIN /66.9 fCLKIN /64 fCLKIN /51.9 to fCLKIN/2 Group Delay Settling Time Low Pass Decimate by 16 0 kHz to fCLKIN/41.75 fCLKIN /33.45 fCLKIN /32 fCLKIN /25.95 to fCLKIN /2 Group Delay Settling Time Band Pass Decimate by 32 fCLKIN /51.90 to fCLKIN /41.75 fCLKIN /62.95, fCLKIN/33.34 fCLKIN /64, fCLKIN /32 0 kHz to fCLKIN /83.5, fCLKIN /25.95 to fCLKIN /2 Group Delay Settling Time Output Data Rate, FO Decimate by 32 Decimate by 16 ANALOG INPUTS Full-Scale Input Span Bipolar Mode Unipolar Mode VIN(+) – VIN(–) ± 0.001 –3 –6 –90 1293/2fCLKIN 1293/fCLKIN ± 0.001 –3 –6 –90 541/2fCLKIN 541/fCLKIN ± 0.001 –3 –6 –90 1293/2fCLKIN 1293/fCLKIN fCLKIN /32 fCLKIN /16 dB dB dB dB dB dB dB dB dB dB dB dB 0 ± 4/5 × VREF2 8/5 × VREF2 V V –2– REV. 0 AD7723 Parameter ANALOG INPUTS (Continued) Absolute Input Voltage Input Sampling Capacitance Input Sampling Rate, fCLKIN CLOCK CLKIN Duty Ratio REFERENCE REF1 Output Resistance Using Internal Reference REF2 Output Voltage REF2 Output Voltage Drift Using External Reference REF2 Input Impedance REF2 External Voltage Range STATIC PERFORMANCE Resolution Differential Nonlinea.


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