ADS7608A4A

A-Data Synchronous DRAM ADS7608A4A 4M x 8 Bit x 4 Banks General Description The ADS7608A4A are four-bank Synchronous DRAMs organized as 4,194,304 words x 8 bits x 4 banks. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications Features JEDEC standard LVTTL 3.3V power supply MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & Interleave) 4 banks operation All inputs are sampled at the positive edge of the system clock Burst Read single write operation Auto & Self refresh 4096 refresh cycle DQM for masking Package:54-pins 400 mil TSOP-Type II Ordering Information. Part No. ADS7608A4A-5 ADS7608A4A-55 ADS7608A4A-6 ADS7608A4A-7 ADS7608A4A-7.5 Pin Assignment Frequency 200Mhz 183Mhz 166Mhz 143Mhz 133Mhz Interface LVTTL LVTTL LVTTL LVTTL LVTTL Package 400mil 54pin TSOPII 400mil 54pin TSOPII 400mil 54pin TSOPII 400mil 54pin TSOPII 400mil 54pin TSOPII VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC VDD NC /WE /CAS /RAS /CS BA0 BA1 A10/AP A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 Vss 53 DQ7 52 VssQ 51 NC 50 DQ6 49 VDDQ 48 NC 47 DQ5 46 VSSQ 45 NC 44 DQ4 43 VDDQ 42 NC 41 VSS 40 NC/RFU 3...