AFE1104E

® AFE 110 4 AFE1104E HDSL/MDSL ANALOG FRONT END FEATURES q COMPLETE ANALOG INTERFACE q T1, E1, AND MDSL OPERATION q CLOCK SCALEABLE SPEED q SINGLE CHIP SOLUTION q +5V ONLY (5V OR 3.3V DIGITAL) q 250mW POWER DISSIPATION q 48-PIN SSOP q –40°C TO +85°C OPERATION DESCRIPTION Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by providing all of the active analog circuitry needed to connect PairGain Technologies SPAROW HDSL digital signal processor to an external compromise hybrid and a 1:2 HDSL line transformer. All internal filter responses as well as the pulse former output scale with clock frequency—allowing the AFE1104 to operate over a range of bit rates from 196kbps to 1.168Mbps. Functionally, this unit is separated into a transmit and a receive section. The transmit section generates, filters, and buffers outgoing 2B1Q data. The receive section filters and digitizes the symbol data received on the telephone line and passes it to the SPAROW. The HDSL Analog Interface is a monolithic device fabricated on 0.6µCMOS. It operates on a single +5V supply. It is housed in a 48-pin SSOP package. Pulse Former Line Driver txLINEP txLINEN PLLOUT PLLIN txDAT txCLK Transmit Control REFP Voltage Reference VCM REFN rxSYNC rxCLK rxLOOP rxGAIN Delta-Sigma Modulator 14 rxD13 - rxD0 Decimation Filter 2 rxLINEN rxHYBP rxHYBN Receive Control rxLINEP Patents Pending International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ ...