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AT91FR4081 Dataheets PDF



Part Number AT91FR4081
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description AT91 ARM Thumb Microcontrollers
Datasheet AT91FR4081 DatasheetAT91FR4081 Datasheet (PDF)

Features • Incorporates the ARM7TDMI™ ARM® Thumb® Processor Core – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE (In-circuit Emulation) 136K Bytes of On-chip SRAM – 32-bit Data Bus, Single-clock Cycle Access 512K Words 16-bit Flash Memory (8 Mbits) – Single Voltage Read/Write, 110 ns Access Time – Sector Erase Architecture – Fast Word Program Time of 20 µs; Fast Sector Erase Time of 200 ms – Dual-plane Organization Allows Con.

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Features • Incorporates the ARM7TDMI™ ARM® Thumb® Processor Core – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE (In-circuit Emulation) 136K Bytes of On-chip SRAM – 32-bit Data Bus, Single-clock Cycle Access 512K Words 16-bit Flash Memory (8 Mbits) – Single Voltage Read/Write, 110 ns Access Time – Sector Erase Architecture – Fast Word Program Time of 20 µs; Fast Sector Erase Time of 200 ms – Dual-plane Organization Allows Concurrent Read and Program/Erase – Erase Suspend Capability – Low-power Operation: 25 mA Active, 10 µA Standby – Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection – Reset Input for Device Initialization – Sector Program Unlock Command – Factory-programmed AT91 Flash Uploader Software Fully Programmable External Bus Interface (EBI) – Up to 8 Chip Selects, Maximum External Address Space of 64M Bytes – Software Programmable 8/16-bit External Data Bus 8-level Priority, Individually Maskable, Vectored Interrupt Controller – 4 External Interrupts, Including a High-priority Low-latency Interrupt Request 32 Programmable I/O Lines 3-channel 16-bit Timer/Counter – 3 External Clock Inputs – 2 Multi-purpose I/O Pins per Channel 2 USARTs – 2 Dedicated Peripheral Data Controller (PDC) Channels per USART Programmable Watchdog Timer Advanced Power-saving Features – CPU and Peripherals Can be De-activated Individually Fully Static Operation: – 0 Hz to 33 MHz Internal Frequency Range at 3.0V, 85°C 2.7V to 3.6V Operating Range -40°C to 85°C Temperature Range Available in a 120-ball BGA Package • • AT91 ARM® Thumb® Microcontrollers AT91FR4081 • • • • • • • • • • • Description The AT91FR4081 is a member of the Atmel AT91 16/32-bit Microcontroller family, which is based on the ARM7TDMI processor core. The processor has a high-performance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption. In addition, a large number of internally banked registers result in very fast exception handling, making the device ideal for real-time control applications. The eight-level priority-vectored interrupt controller, together with the Peripheral Data Controller, significantly enhance real-time device performance. By combining the microcontroller, featuring more than 1 Mbit of on-chip SRAM and a wide range of peripheral functions, with 8 Mbits of Flash memory in a single compact 120-ball BGA package, the Atmel AT91FR4081 provides a powerful, flexible and costeffective solution to many compute-intensive embedded control applications and offers significant board size and system cost reductions. The Flash memory may be programmed via the JTAG/ICE interface or the factory-programmed Flash Uploader using a single device supply, making the AT91FR4081 ideal for in-system programmable applications. Rev. 1386C–ATARM–02/02 1 Pin Configuration Figure 1. AT91FR4081 Pinout (Top View) K J H G F E D C B A 1 GND P26 NCS2 NCS0 TCK TDO P25 MCKO MCKI P22 RXD1 P21/TXD1 GND NTRI 2 P27 NCS3 A0 NLB NCS1 NWAIT TDI VDD GND VDD P18 P20 SCK1 P15 RXD0 P11 IRQ2 P8 TIOB2 P5 TIOB1 P4 TIOA1 VDD 3 TMS P24 BMS NWODVF NWR1 NUB P13 SCK0 P17 P16 P19 4 VDD P23 NRST P12 FIQ P9 IRQ0 P6 TCLK2 P0 TCLK0 P14 TXD0 5 GND P10 IRQ1 GND VDD 6 VDD GND P30/A22 CS5 P7 TIOA2 7 GND P29/A21 P31/A23 CS6 CS4 P3 TCLK1 8 A1 GND VDD VDD GND P2 TIOB0 9 NCSF NRD NOE VDD GND VDD A2 10 GND D0 D8 P1 TIOA0 A3 A4 11 D2 D9 D1 A5 A6 A7 12 D11 D3 D10 A8 A18 VPP 13 D5 D12 D4 A19 NBUSY P28/A20 CS7 14 D14 VDD NC D6 GND VDD NRSTF NWR0 NWE A9 A10 15 GND D15 D7 NC D13 GND A11 A12 A13 VDD 16 VDD A17 GND VDD NC NC A14 A16 A15 GND 2 AT91FR4081 1386C–ATARM–02/02 AT91FR4081 Pin Description Table 1. AT91FR4081 Pin Description Module Name A0 - A23 D0 - D15 NCS0 - NCS3 CS4 - CS7 NWR0 NWR1 NRD EBI NWE NOE NUB NLB NWAIT BMS FIQ AIC IRQ0 - IRQ2 TCLK0 - TCLK2 Timer TIOA0 - TIOA2 TIOB0 - TIOB2 SCK0 - SCK1 USART TXD0 - TXD1 RXD0 - RXD1 PIO WD Clock MCKO NRST Reset NTRI TMS TDI ICE TDO TCK Test Data Output Test Clock Output Input – – Schmidt trigger, internal pull-up Tri-state Mode Select Test Mode Select Test Data Input Input Input Input Low – – Sampled during reset Schmidt trigger, internal pull-up Schmidt trigger, internal pull-up Master Clock Output Hardware Reset Input Output Input – Low Schmidt trigger P0 - P31 NWDOVF MCKI External Interrupt Request Timer External Clock Multi-purpose Timer I/O Pin A Multi-purpose Timer I/O Pin B External Serial Clock Transmit Data Output Receive Data Input Parallel IO Line Watchdog Overflow Master Clock Input Input Input I/O I/O I/O Output Input I/O Output Input – – – – – – – – Low – Open drain Schmidt trigger PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset Function Address Bus Data Bus External Chip Select External Chip Select Lower Byte 0 Write Signal Upper Byte 1 Write Signal Read Signal W.


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