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ANSALDO
Ansaldo Trasporti s.p.a. Unita' Semiconduttori
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I -
PHASE CONTROL THYRISTOR
AT726
Repetitive voltage up to Mean on-state current Surge current 1600 V 2400 A 38 kA
FINAL SPECIFICATION
feb 97 - ISSUE : 02
Symbol
Characteristic
Conditions
Tj [°C]
125 125 125
Value
Unit
BLOCKING
V V V I I
RRM RSM DRM RRM DRM
Repetitive peak reverse voltage Non-repetitive peak reverse voltage Repetitive peak off-state voltage Repetitive peak reverse current Repetitive peak off-state current V=VRRM V=VDRM
1600 1700 1600 100 100
V V V mA mA
125 125
CONDUCTING
I I I V V r
T (AV) T (AV) TSM
Mean on-state current Mean on-state current Surge on-state current I² t On-state voltage Threshold voltage On-state slope resistance
180° sin, 50 Hz, Th=55°C, double side cooled 180° sin, 50 Hz, Tc=85°C, double side cooled sine wave, 10 ms without reverse voltage On-state current = 6000 A 25 125 125 125
2400 1885 38 7220 x1E3 1.65 0.77 0.160
A A kA A²s V V mohm
I² t
T T(TO) T
SWITCHING
di/dt dv/dt td tq Q rr I rr I I
H L
Critical rate of rise of on-state current, min. Critical rate of rise of off-state voltage, min. Gate controlled delay time, typical Circuit commutated turn-off time, typical Reverse recovery charge Peak reverse recovery current Holding current, typical Latching current, typical
From 75% VDRM up to 2300 A, gate 10V 5ohm Linear ramp up to 70% of VDRM VD=100V, gate source 25V, 10 ohm , tr=.5 µs dV/dt = 20 V/µs linear up to 75% VDRM di/dt=-20 A/µs, I= 1500 A VR= 50 V VD=5V, gate open circuit VD=5V, tp=30µs
125 125 25 125 25 25
200 500 1 250
A/µs V/µs µs µs µC A
300 700
mA mA
GATE
V I V V I V P P
GT GT GD FGM FGM RGM GM G
Gate trigger voltage Gate trigger current Non-trigger gate voltage, min. Peak gate voltage (forward) Peak gate current Peak gate voltage (reverse) Peak gate power dissipation Average gate power dissipation
VD=5V VD=5V VD=VDRM
25 25 125
3.5 200 0.25 30 10 5
V mA V V A V W W
Pulse width 100 µs
150 2
MOUNTING
R R T F
th(j-h) th(c-h) j
Thermal impedance, DC Thermal impedance Operating junction temperature Mounting force Mass ORDERING INFORMATION : AT726 S 16 standard specification
Junction to heatsink, double side cooled Case to heatsink, double side cooled
17 3 -30 / 125 40.0 / 50.0 1000
°C/kW °C/kW °C kN g
VDRM&VRRM/100
AT726 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION feb 97 - ISSUE : 02
ANSALDO
DISSIPATION CHARACTERISTICS SQUARE WAVE
Th [°C] 130 120 110 100 90
30°
80
60°
70
90°
60 50 0 500 1000 1500
120°
180° DC
2000
2500
3000
3500
IF(AV) [A]
PF(AV) [W] 4500
DC
4000
180°
3500
90°
120°
3000 2500 2000 1500 1000 500 0 0 500 1000 1500 2000 2500 3000 3500 IF(AV) [A]
30° 60°
AT726 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION feb 97 - ISSUE : 02
ANSALDO
DISSIPATION CHARACTERISTICS SINE WAVE
Th [°C] 130 120 110 100 90
30°
80
60°
70
90°
60 50 0 500 1000 1500
120°.