Features
Utilizes the AVR® RISC Architecture AVR – High-performance and Low-power RISC Architecture
– 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Throughput at 20 MHz Data and Non-volatile Program and Data Memories – 2K Bytes of In-System Self Programm...
