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BF720T1 Dataheets PDF



Part Number BF720T1
Manufacturers Motorola Inc
Logo Motorola  Inc
Description NPN Ssilicon Transistor
Datasheet BF720T1 DatasheetBF720T1 Datasheet (PDF)

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by BF720T1/D NPN Silicon Transistor COLLECTOR 2,4 BASE 1 EMITTER 3 BF720T1 Motorola Preferred Device NPN SILICON TRANSISTOR SURFACE MOUNT MAXIMUM RATINGS Rating Collector-Emitter Voltage Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current Total Power Dissipation up to TA = 25°C Storage Temperature Range Junction Temperature Symbol VCEO VCBO VCER VEBO IC PD Tstg TJ Value 300 300 300 5.0 100 1.5 – 6.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by BF720T1/D NPN Silicon Transistor COLLECTOR 2,4 BASE 1 EMITTER 3 BF720T1 Motorola Preferred Device NPN SILICON TRANSISTOR SURFACE MOUNT MAXIMUM RATINGS Rating Collector-Emitter Voltage Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current Total Power Dissipation up to TA = 25°C Storage Temperature Range Junction Temperature Symbol VCEO VCBO VCER VEBO IC PD Tstg TJ Value 300 300 300 5.0 100 1.5 – 65 to +150 150 Unit Vdc Vdc Vdc Vdc mAdc Watts °C °C 1 2 3 4 CASE 318E-04, STYLE 1 SOT–223 (TO-261AA) DEVICE MARKING DC THERMAL CHARACTERISTICS Characteristic Thermal Resistance from Junction-to-Ambient(1) Symbol RθJA Max 83.3 Unit °C/W ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristics Symbol Min Max Unit OFF CHARACTERISTICS Collector-Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) Collector-Base Breakdown Voltage (IC = 100 µAdc, IE = 0) Collector-Emitter Breakdown Voltage (IC = 100 µAdc, RBE = 2.7 kΩ) Emitter-Base Breakdown Voltage (IE = 10 µAdc, IC = 0) Collector-Base Cutoff Current (VCB = 200 Vdc, IE = 0) Collector–Emitter Cutoff Current (VCE = 250 Vdc, RBE = 2.7 kΩ) (VCE = 200 Vdc, RBE = 2.7 kΩ, TJ = 150°C) V(BR)CEO V(BR)CBO V(BR)CER V(BR)EBO ICBO ICER — — 50 10 nAdc µAdc 300 300 300 5.0 — — — — — 10 Vdc Vdc Vdc Vdc nAdc 1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 in2. Thermal Clad is a trademark of the Bergquist Company Preferred devices are Motorola recommended choices for future use and best overall value. REV 2 Motorola Small–Signal © Motorola, Inc. 1996 Transistors, FETs and Diodes Device Data 1 BF720T1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Max Unit ON CHARACTERISTICS DC Current Gain (IC = 25 mAdc, VCE = 20 Vdc) Collector-Emitter Saturation Voltage (IC = 30 mAdc, IB = 5.0 mAdc) hFE VCE(sat) 50 — — 0.6 — Vdc DYNAMIC CHARACTERISTICS Current–Gain — Bandwidth Product (IC = 10 mAdc, VCE = 10 Vdc, f = 35 MHz) Feedback Capacitance (VCE = 30 Vdc, IC = 0, f = 1.0 MHz) fT Cre 60 — — 1.6 MHz pF 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data BF720T1 INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.15 3.8 0.079 2.0 interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.091 2.3 0.079 2.0 0.059 1.5 0.059 1.5 0.091 2.3 0.248 6.3 0.059 1.5 inches mm SOT-223 SOT-223 POWER DISSIPATION The power dissipation of the SOT-223 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT-223 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA power dissipation can be increased. Although the power dissipation can almost be doubled with this method, area is taken up on the printed circuit board which can defeat the purpose of using surface mount technology. A graph of RθJA versus collector pad area is shown in Figure 6. 160 R JA , Thermal Resistance, Junction to Ambient ( C/W) Board Material = 0.0625″ G-10/FR-4, 2 oz Copper 0.8 Watts TA = 25°C 140 ° 120 1.25 Watts* 1.5 Watts The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 1.5 watts. PD = 150°C – 25°C = 1.5 watts 83.3°C/W The 83.3°C/W for the SOT-223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 1.5 watts. There are other alternatives to achieving higher power dissipation from the SOT-223 package. One is to increase the area of the collector pad. By increasing the area of the collector pad, the 100 *Mounted on the DPAK footprint 0.2 0.4 0.6 A, Area (square inches) 0.8 1.0 Motorola Small–Signal Transistors, FETs and Diodes Device Data θ 80 0.0 Figure 1. Thermal Resistance versus Collector Pad Area for the SOT-223 Package (Typical) Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 3 BF720T1 SOLDER STEN.


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