ONB2

Core Logic 21%[ $0,+*  PLFURQ &026 *DWH $UUD\ Description ONBx is a family of OR-NAND circuits consisting of three 2-input OR gates into a 3-input NAND gate. Logic Symbol Truth Table A ONBx A BCDE FQ B L LXXXXH C XXL LXXH D Q XXXXL LH All other combinations L E F HDL Syntax Verilog .................... ONBx inst_name (Q, A, B, C, D, E, F); VHDL...................... inst_name: ONBx port map (Q, A, B, C, D, E, F) Pin Loading Pin Name A B C D E F ONB2 1.0 1.0 1.0 1.0 1.0 1.0 Equivalent Loads ONB4 1.0 1.0 1.0 1.0 1.0 1.0 ONB6 2.1 2.1 2.1 2.1 2.1 2.1 Size And Power Characteristics Cell ONB2 ONB4 Equivalent Gates 5.0 6.0 Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) TBD 10.5 TBD 11.1 ONB6 12.0 TBD 18.8 a. See page 2-15 for power equation. 3-202 ® ® Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.0V, Typical Process Number of Equivalent Loads 1 4 ONB2 From: Any Input To: Q tPLH tPHL 0.41 0.50 0.49 0.65 Number...