CMOS Gate Array
Core Logic
12[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description NO3x is a family of 3-input gates which perform the l...
Description
Core Logic
12[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description NO3x is a family of 3-input gates which perform the logical NOR function.
Logic Symbol
Truth Table
NO3x
A BQ C
A BQ C
A B CQ L L LH HXX L XHX L XXHL
HDL Syntax Verilog .................... NO3x inst_name (Q, A, B, C); VHDL...................... inst_name: NO3x port map (Q, A, B, C);
Pin Loading
Pin Name
A B C
NO31 1.0 1.0 1.0
NO32 2.1 2.1 2.1
Equivalent Loads NO33 2.1 2.1 2.1
NO34 2.1 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
NO31
2.0
TBD
1.9
NO32
3.0
TBD
3.2
NO33
6.0
TBD
8.7
NO34 NO36
7.0 7.0
TBD TBD
10.7 13.3
a. See page 2-15 for power equation.
NO36 2.1 2.1 2.1
3-175
12[
$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
NO31
Number of Equivalent Loads
From: Any Input To: Q
tPLH tPHL
Number of Equivalent Loads
1
0.19 0.14
1
2
0...
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