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MACH120-15

Lattice

High-Performance EE CMOS Programmable Logic

MACH 1 & 2 Families Lattice Semiconductor 1 FINAL COM’L: -12/15 MACH 1 & 2 FAMILIES IND: -18 MACH120-12/15 High-Per...


Lattice

MACH120-15

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Description
MACH 1 & 2 Families Lattice Semiconductor 1 FINAL COM’L: -12/15 MACH 1 & 2 FAMILIES IND: -18 MACH120-12/15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 68 Pins in PLCC x 48 Macrocells x 12 ns tPD Commercial, 18 ns tPD Industrial x 77 MHz fCNT Commercial x 48 I/Os; 4 dedicated inputs; 4 dedicated inputs/clocks x 48 Outputs x 48 Flip-flops; 4 clock choices x 4 “PALCE26V12” blocks x SpeedLocking™ for guaranteed fixed timing x Pin-compatible with the MACH221 GENERAL DESCRIPTION The MACH120 is a member of the high-performance EE CMOS MACH ® 1 family. This device has approximately five times the logic macrocell capability of the popular PALCE22V10 without loss of speed. The MACH120 consists of four PAL® blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be place...




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