AT89S54

Features 80C52 Compatible – 8051 Instruction Compatible – Six 8-bit I/O Ports (64 Pins or 68 Pins Versions) – Four 8-bit I/O Ports (44 Pins Version) – Three 16-bit Timer/Counters – 256 Bytes Scratch Pad RAM – 9 Interrupt Sources with 4 Priority Levels Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply (AT89S64 Only) ISP (In-System Programming) Using Standard VCC Power Supply 2048 Bytes Boot ROM Contains Low Level Flash Programming Routines and a Default Serial Loader High-speed Architecture – In Standard Mode: 40 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution) 60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only) – In X2 mode (6 Clocks/machine cycle) 20 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution) 30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only) 16K/32K/64K Bytes On-chip Flash Program/Data Memory – Byte and Page (128 Bytes) Erase and Write – 100k Write Cycles On-chip...