BST84

DISCRETE SEMICONDUCTORS DATA SHEET BST84 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION N-channel vertical D-MOS transistor in SOT89 envelope and designed for use as line current interrupter in telephone sets and for application in relay, high-speed and line-transformer drivers. FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No second breakdown PINNING - SOT89 1 = source 2 = gate 3 = drain Transfer admittance ID = 250 mA; VDS = 15 V  Yfs typ. QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance ID = 250 mA; VGS = 10 V RDS(on) typ. max. VDS ±VGSO ID Ptot max. max. max. max. BST84 200 V 20 V 250 mA 1 W 6 Ω 12 Ω 250 mS PIN CONFIGURATION handbook, halfpage handbook, 2 columns d g MBB076 - 1 s 1 Bottom view 3 2 MSB013 Marking: KN Fig.1 Simplified outline and symbol. April 1995 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 °C (note 1) Storage temperature range Junction tem...