Document
DISCRETE SEMICONDUCTORS
DATA SHEET
BST70A N-channel vertical D-MOS transistor
Product specification File under Discrete Semiconductors, SC13b April 1995
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in TO-92 variant envelope and intended for use in relay, high-speed and line-transformer drivers. FEATURES: • Very low RDS(on) • Direct interface to C-MOS, TTL, etc. • High-speed switching • No second breakdown PINNING - TO-92 VARIANT 1 = source 2 = gate 3 = drain QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance ID = 500 mA; VGS = 10 V Transfer admittance ID = 500 mA; VDS = 15 V Yfs typ. RDS(on) VDS VGSO ID Ptot
BST70A
max. max. max. max. typ. max.
80 V 20 V 0.5 A 1 W 2 Ω 4 Ω
300 mS
PIN CONFIGURATION
handbook, halfpage
d
1 2 3 g
MAM146
s
Note: Various pinout configurations available.
Fig.1 Simplified outline and symbol.
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 °C (note 1) Storage temperature range Junction temperature THERMAL RESISTANCE From junction to ambient (note 1) Note 1. Transistor mounted on printed circuit board, max. lead length 4 mm, mounting pad for drain lead min. 10 mm × 10 mm. Rth j-a = VDS VGSO ID IDM Ptot Tstg Tj max. max. max. max. max. max.
BST70A
80 V 20 V 0.5 A 1.0 A 1 W 150 °C
− 65 to + 150 °C
125 K/W
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
CHARACTERISTICS Tj = 25 °C unless otherwise specified Drain-source breakdown voltage ID = 10 µA; VGS = 0 Drain-source leakage current VDS = 60 V; VGS = 0 Gate-source leakage current VGS = 20 V; VDS = 0 Gate threshold voltage ID = 1 mA; VDS = VGS Drain-source ON-resistance (see Fig.4) ID = 500 mA; VGS = 10 V Transfer admittance ID = 500 mA; VDS = 15 V Input capacitance at f = 1 MHz VDS = 10 V; VGS = 0 Output capacitance at f = 1 MHz VDS = 10 V; VGS = 0 Feedback capacitance at f = 1 MHz VDS = 10 V; VGS = 0 Switching times (see Figs 2 and 3) ID = 500 mA; VDS = 50 V; VGS = 0 to 10 V ton toff max. max. Crss typ. max. Coss typ. max. Ciss typ. max. Yfs typ. RDS(on) typ. max. VGS(th) min. max. IGSS max. IDSS max. V(BR)DS min.
BST70A
80 V 1 µA 100 nA 1.5 V 3.5 V 2.0 Ω 4.0 Ω
300 mS 45 pF 60 pF
30 pF 45 pF
8 pF 12 pF
10 ns 15 ns
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST70A
handbook, halfpage
VDD = 50 V
handbook, halfpage
90 %
INPUT 10 %
10 V 0V ID 50 Ω
MSA631
90 % OUTPUT 10 % ton toff
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
103 handbook, halfpage VGS = 10 V ID (mA)
MDA724
6V 5V
handbook, halfpage
1.2
MDA725
ID (A) 0.8
4V
102
0.4
10
0 0 2 4 6 8 10 RDSon (Ω) 0 2 4 6 8 10 VGS (V)
Fig.4 Tj = 25 °C; typical values.
Fig.5 Tj = 25 °C; typical values at VDS = 10 V.
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST70A
handbook, halfpage VGS = 10 V
1.2
MDA726
6V
handbook, halfpage
1.2
MRC238
ID (A) 0.8 5V
Ptot (W) 0.8
0.4
4V
0.4
3V 0 0 2 4 6 8 10 VDS (V) 0 0 50 100 150 200 Tamb (°C)
Fig.6 Tj = 25 °C; typical values.
Fig.7 Power derating curve.
handbook, halfpage
3
MDA728
handbook, halfpage
1.2 k
MDA729
k 2.5
1.1
2
1
1.5
0.8
1
0.8
0.5 −50
0
50
100
Tj (°C)
150
0.7 −50
0
50
100
Tj (°C)
150
Fig.8 R DS (on) at T j -; k = -------------------------------------------R DS (on) at 25 ° C typ. values at 500 mA/10 V.
Fig.9 V GS ( th ) at T j -; k = -------------------------------------------V GS ( th ) at 25 ° C VGS(th) at 1 mA; typical values.
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST70A
handbook, halfpage
120
MDA730
C (pF) 80
Ciss 40 Coss Crss 0 0 10 20 VDS (V) 30
Fig.10 Tj = 25 °C; VGS = 0; f = 1 MHz; typical values.
April 1995
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Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
PACKAGE OUTLINES Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
BST70A
SOT54 variant
c
L2
E d A L b
1 2
D e1 e
3
b1
L1
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Notes 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 variant REFERENCES IEC JEDEC TO-92 EIAJ SC-43 EUROPEAN PROJECTION ISSUE DATE 97-04-14 A 5.2 5.0 b 0.48 0.40 b1 0.66 0.56 c 0.45 0.40 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 e 2.54 e1 1.27 L 14.5 12.7 L1(1) max 2.5 L2 max 2.5
April 1995
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Philips Semiconductors
Product specific.