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BSP89

NXP

N-channel enhancement mode vertical D-MOS transistor

DISCRETE SEMICONDUCTORS DATA SHEET BSP89 N-channel enhancement mode vertical D-MOS transistor Product specification Fil...


NXP

BSP89

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DISCRETE SEMICONDUCTORS DATA SHEET BSP89 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope, intended for use as a surface-mounted device in line current interrupters in telephone sets and for application in relay, high speed and line transformer drivers. PINNING - SOT223 1 2 3 MAM109 BSP89 QUICK REFERENCE DATA SYMBOL VDS ID RDS(on) VGS(th) PARAMETER drain-source voltage DC drain current drain-source on-resistance gate-source threshold voltage MAX. 240 350 6 2 UNIT V mA Ω V handbook, halfpage 4 d g PIN 1 2 3 4 gate drain DESCRIPTION Code: BSP89 s Top view source drain Fig.1 Simplified outline (SOT223) and symbol. LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL VDS ±VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage gate-source voltage DC drain current peak drain current total power dissipation storage temperature range junction temperature up to Tamb = 25 °C (note 1) open drain CONDITIONS MIN. − − − − − −65 − MAX. 240 20 350 1.4 1.5 150 150 UNIT V V mA A W °C °C THERMAL RESISTANCE SYMBOL Rth j-a Note 1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 ...




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