BSP110

DISCRETE SEMICONDUCTORS DATA SHEET BSP110 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and designed for use in telephone ringer circuits and for application in relay, high-speed and line transformer drivers. FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain MARKING CODE BSP110 PIN CONFIGURATION QUICK REFERENCE DATA Drain-source voltage Drain source voltage (non-repetitive peak; tp ≤ 2 ms) Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance ID = 200 mA; VGS = 10 V Transfer admittance ID = 200 mA; VDS = 15 V  Yfs  min. typ. RDS(on) VDS(SM) ± VGSO ID Ptot VDS BSP110 max. max. max. max. max. typ. max. 80 V 100 V 20 V 325 mA 1.5 W 4.5 Ω 7 Ω 75 mS 150 mS handbook, halfpage 4 d g 1 Top view 2 3 MAM054 s Fig.1 Simplfied outline and symbol. April 1995 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Drain-source voltage (non-repetitive peak; tp ≤ 2 ms) Gate-source voltage ...