BSN205A

DISCRETE SEMICONDUCTORS DATA SHEET BSN205; BSN205A N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope. Designed primarily as a line current interrupter in telephone sets, it can also be applied in other applications such as in relays, line and high speed transformer drivers etc. FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown Low RDS(on) PINNING - TO-92 VARIANT BSN205 1 2 3 PIN CONFIGURATION = gate = drain = source 1 2 3 QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance ID = 400 mA; VGS = 10 V Transfer admittance ID = 400 mA; VDS = 25 V Ptot BSN205; BSN205A VDS ± VGSO ID max. max. max. max. typ. max. 200 V 20 V 300 mA 1 W 4.5 Ω 6 Ω 200 mS 350 mS RDS(on)  Yfs  min. typ. BSN205A = source = gate = drain handbook, halfpage d 1 2 3 g s MAM148 Note: various pinout configurations available. Fig.1 Simplified outline and symbol. April 1995 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage...