HD74AC368

HD74AC368 Hex Inverter Buffer with 3-State Output Features 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Outputs Source/Sink 24 mA REJ03D0272–0200Z (Previous ADE-205-393 (Z)) Rev.2.00 Jul.16.2004 Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC368FPEL SOP-16 pin (JEITA) FP-16DAV FP EL (2,000 pcs/reel) HD74AC368RPEL SOP-16 pin (JEDEC) FP-16DNV RP EL (2,500 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement OE1 1 I2 O3 I4 O5 I6 O7 GND 8 (Top view) 16 VCC 15 OE2 14 I 13 O 12 I 11 O 10 I 9O Rev.2.00, Jul.16.2004, page 1 of 5 HD74AC368 Logic Symbol OE IO Pin Names OE1, OE2 I O 3-State Output: Enable Input (Active Low) Inputs Outputs Truth Table Inputs OE L L H H : High Voltage Level L : ...