Document
HD74LS390
Dual Decade Counters
REJ03D0485-0400 Rev.4.00
May 10, 2006
This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters. The HD74LS390 incorporates dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and / or cumulative multiples of 2 and / or 5 up to divide-by-100. When connected as a biquinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage.
Features
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Package Abbreviation
HD74LS390P
DILP-16 pin
PRDP0016AE-B (DP-16FV)
P
HD74LS390FPEL SOP-16 pin (JEITA)
PRSP0016DH-B (FP-16DAV)
FP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation (Quantity) —
EL (2,000 pcs/reel)
Pin Arrangement
1A 1
1Clear
1QA Output
1B
2 3 4
1QB 5
Outputs 1QC 6
1QD 7
GND 8
CLR 1.