HD74LS20

HD74LS20 Dual 4-input Positive NAND Gates Features Ordering Information Part Name Package Type Package Code Package (Previous Code) Abbreviation HD74LS20P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74LS20FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP HD74LS20RPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP Note: Please consult the sales office for the above package availability. Pin Arrangement REJ03D0400–0200 Rev.2.00 Feb.18.2005 Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (2,500 pcs/reel) 1A 1 1B 2 NC 3 1C 4 1D 5 1Y 6 GND 7 14 VCC 13 2D 12 2C 11 NC 10 2B 9 2A 8 2Y (Top view) Rev.2.00, Feb.18.2005, page 1 of 5 HD74LS20 Circuit Schematic (1/2) Inputs A B C D 8k 75 VCC 20k 4.5k Output Y 1.5k 3k GND Absolute Maximum Ratings Item Symbol Ratings Supply voltage VCC 7 Input voltage VIN 7 Power dissipation PT 400 Storage temperature Tstg –65 to +150 Note: Voltage value, unless otherwise noted, are with respect to network ground...