Document
HD74LS156
Dual 2-line-to-4-line Decoders / Demultiplexers (with open collector outputs)
REJ03D0441–0300 Rev.3.00
Jul.13.2005
This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating.
Features
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Package Abbreviation
HD74LS156P
DILP-16 pin
PRDP0016AE-B (DP-16FV)
P
HD74LS156RPEL SOP-16 pin (JEDEC)
PRSP0016DG-A (FP-16DNV)
FP
Note: Please consult the sales office for the above package availabi.