Dual 2-line-to-4-line Decoders / Demultiplexers
(with open collector outputs)
This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input.
When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route
associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting
each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following
the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating.
• Ordering Information
HD74LS156RPEL SOP-16 pin (JEDEC)
Note: Please consult the sales office for the above package availability.
EL (2,500 pcs/reel)
Data 1C 1
Strobe 1G 2
Select Input B 3
15 Data 2C
14 Strobe 2G
13 Select Input A
Rev.3.00, Jul.13.2005, page 1 of 6