DatasheetsPDF.com
HD74LS107A
Dual J-K Negative-edge-triggered Flip-Flops
Description
HD74LS107A Dual J-K Negative-edge-triggered Flip-Flops (with Clear) REJ03D0425–0300 Rev.3.00 Jul.13.2005 Features Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS107AP DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74LS107AFPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP Note: Please consult the sa...
Renesas
Download HD74LS107A Datasheet
Similar Datasheet
HD74LS10
Triple 3-input Positive NAND Gates
- Hitachi Semiconductor
HD74LS10
Triple 3-Input Positive NAND Gates
- Renesas
HD74LS107A
Dual J-K Negative-edge-triggered Flip-Flops
- Hitachi Semiconductor
HD74LS107A
Dual J-K Negative-edge-triggered Flip-Flops
- Renesas
HD74LS107AP
Dual J-K Negative-edge-triggered Flip-Flops
- Renesas
HD74LS109
Dual J-K Positive-edge-triggered Flip-Flops
- Hitachi Semiconductor
HD74LS109A
Dual J-K Positive-edge-triggered Flip-Flops
- Hitachi Semiconductor
HD74LS10P
Triple 3-Input Positive NAND Gates
- Renesas
@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (
Privacy Policy & Contact
)