512Mb: x32 Automotive Mobile LPDDR2 SDRAM
Features1
Automotive Mobile LPDDR2 SDRAM
EDB5432BEBH, EDB5432BEPA
Features1
• Ultra low-voltage core and I/O power supplies
– VDD2 = 1.14–1.30V
– VDDCA/VDDQ = 1.14–1.30V
– VDD1 = 1.70–1.95V
• Clock frequency range
– 533–10 MHz (data rate range: 1066–20 Mb/s/pin)
• Four-bit prefetch DDR architecture
• Four internal banks for concurrent operation
• Multiplexed, double data rate, command/address
inputs; commands entered on every CK edge
• Bidirectional/differential data strobe per byte of
data (DQS/DQS#)
• Programmable READ and WRITE latencies (RL/WL)
• Programmable burst lengths: 4, 8, or 16
• On-chip temperature sensor to control self refresh
rate
• Partial-array self refresh (PASR)2
• Deep power-down mode (DPD)
• Selectable output drive strength (DS)
• Clock stop capability
• RoHS-compliant, “green” packaging
Table 1: Key Timing Parameters
Speed Clock Rate Data Rate
Grade (MHz) (Mb/s/pin) RL WL tRCD/tRP
-1D 533
1066
8 4 Typical
Options
• VDD2: 1.2V
• Density/Page Size
– 512Mb/2KB - single die
• Organization
– x32
• FBGA “green” package
– 134-ball VFBGA
(10mm x 11.5mm)
– 168-ball WFBGA
(12mm x 12mm)
• Timing – cycle time
– 1.875ns @ RL = 8
• Special options
– Standard
– Automotive certified
(Package-level burn-in)
• Operating temperature range
– From –40°C to +85°C
– From –40°C to +105°C
– From –40°C to +125°C3
• Revision
Marking
B
54
32
BH
PA
-1D
None
A
IT
AT
UT
:E
Notes:
1. All items related to 8-bank in this data
sheet are not available. For example per-
bank refresh option is not supported.
2. When TC > 105°C, self-refresh mode is not
available.
3. UT option use based on automotive usage
model. Please contact Micron sales repre-
sentative if you have questions.
09005aef86573be0
u97m_auto_lpddr2_ait_aat_aut.pdf - Rev. G 07/17 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
