K7B403625M
Document Title
128Kx36-Bit Synchronous Burst SRAM
128Kx36 Synchronous SRAM
Revision History
Rev. No. History
Draft Date
0.0 Initial draft
May. 15. 1997
0.1 Modify power down cycle timing & Interleaved read timing, Insert Note 4 at AC timing characteristics. Change ISB1 value from 10mA to 30mA. Change ISB2 value from 10mA to 20mA.
Feb. 11. ...
