DatasheetsPDF.com

M24C64-R Dataheets PDF



Part Number M24C64-R
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description 64-Kbit serial I2C bus EEPROM
Datasheet M24C64-R DatasheetM24C64-R Datasheet (PDF)

M24C64-W M24C64-R M24C64-F M24C64-DF Datasheet 64-Kbit serial I²C bus EEPROMs WLCSP (CU) WLCSP (CS) UFDFPN5 (MH) DFN5 - 1.7 x 1.4 mm SO8N (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MC) DFN8 - 2 x 3 mm Thin WLCSP (CT) Unsawn wafer Product status link M24C64-W M24C64-R M24C64-F M24C64-DF Features • Compatible with following I2C bus modes: – 1 MHz – 400 kHz – 100 kHz • Memory array: – 64 Kbit (8 Kbyte) of EEPROM – Page size: 32 byte – Additional Write lockable page (M24C64-D or.

  M24C64-R   M24C64-R


Document
M24C64-W M24C64-R M24C64-F M24C64-DF Datasheet 64-Kbit serial I²C bus EEPROMs WLCSP (CU) WLCSP (CS) UFDFPN5 (MH) DFN5 - 1.7 x 1.4 mm SO8N (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MC) DFN8 - 2 x 3 mm Thin WLCSP (CT) Unsawn wafer Product status link M24C64-W M24C64-R M24C64-F M24C64-DF Features • Compatible with following I2C bus modes: – 1 MHz – 400 kHz – 100 kHz • Memory array: – 64 Kbit (8 Kbyte) of EEPROM – Page size: 32 byte – Additional Write lockable page (M24C64-D order codes) • Single supply voltage: – 1.7 V to 5.5 V over –40 °C / +85 °C – 1.6 V to 5.5 V over 0 °C / +85 °C • Write: – Byte write within 5 ms – Page write within 5 ms • Random and sequential read modes • Write protect of the whole memory array • Enhanced ESD/latch-Up protection • More than 4 million write cycles • More than 200-years data retention Packages Packages RoHS-compliant and Halogen-free • SO8N (ECOPACK2) • TSSOP8 (ECOPACK2) • UFDFPN (ECOPACK2) • WLCSP (ECOPACK2) • Unsawn wafer (each die is tested) DS6638 - Rev 38 - February 2023 For further information contact your local STMicroelectronics sales office. www.st.com M24C64-W M24C64-R M24C64-F M24C64-DF Description 1 Description The M24C64 is a 64-Kbit I2C-compatible EEPROM (electrically erasable programmable memory) organized as 8K × 8 bits. Over an ambient temperature range of -40 °C / +85 °C, the M24C64-W can operate with a supply voltage from 2.5 V to 5.5 V, the M24C64-R can operate with a supply voltage from 1.8 V to 5.5 V, and the M24C64-F and M24C64-DF can operate with a supply voltage from 1.7 V to 5.5 V ( the M24C64-F can also operate down to 1.6 V, under some restricting conditions). The M24C64-D offers an additional page, named the identification page (32 byte). The identification page can be used to store sensitive application parameters which can be (later) permanently locked in read-only mode. Figure 1. Logic diagram VCC 3 E0-E2 SCL WC M24xxx SDA VSS E2, E1, E0 SDA SCL WC VCC VSS Signal name Table 1. Signal names Chip enable Serial data Serial clock Write control Supply voltage Function Ground Input I/O Input Input - Direction Figure 2. 8-pin package connections, top view E0 1 E1 2 E2 3 VSS 4 8 VCC 7 WC 6 SCL 5 SDA 1. See Section 9 Package information for package dimensions, and how to identify pin 1 DT01845fV3 DS6638 - Rev 38 page 2/50 M24C64-W M24C64-R M24C64-F M24C64-DF Description Figure 3. UFDFPN5 (DFN5) package connections VCC 1 VSS 2 SDA 3 ABCD XYZW 5 WC 2 VSS 4 SCL Top view (marking side) 5 1 2 2 4 3 Bottom view (pads side) 1. Inputs E2, E1 and E0 are not connected, therefore read as (000). Refer to Section 2.3 Chip enable (E2, E1, E0) for further explanations. Figure 4. WLCSP 4-bump ultra thin package connections 1 2 A VCC VSS 2 1 VSS VCC A B SCL SDA SDA SCL B Marking side (top view) Bump side (bottom view) MS57081 1. Inputs E2, E1, E0 are read as (000). Refer to Section 2.3 Chip enable (E2, E1, E0) for further explanations. Table 2. WLCSP 4-bump signal vs. bump position Position A 1 VCC 2 VSS B SCL SDA Figure 5. WLCSP 5-bump connections 12 3 A VCC VSS B SDA C WC SCL Marking side (top view) 3 21 VSS VCC A SDA B SCL WC C Bump side (bottom view) MS35045V2 DS6638 - Rev 38 page 3/50 M24C64-W M24C64-R M24C64-F M24C64-DF Description 1. Inputs E2, E1, E0 are internally connected to (001). Refer to Section 2.3 Chip enable (E2, E1, E0) for further explanations. Table 3. WLCSP 5-bump signals vs. bump position Position A 1 VCC 2 - 3 VSS B SDA - C WC SCL Figure 6. WLCSP 8-bump connections 123 4 5 A WC VCC E1 B SDA E0 C SCL VSS E2 Marking side (top view) 543 2 1 E1 VCC WC A E0 SDA B E2 VSS SCL C Bump side (bottom view) MS35046V2 Table 4. WLCSP 8-bump signals vs. bump position Position A 1 WC 2 - 3 VCC 4 - 5 E1 B SDA E0 - C SCL VSS E2 DS6638 - Rev 38 page 4/50 2 Signal description M24C64-W M24C64-R M24C64-F M24C64-DF Signal description 2.1 Serial clock (SCL) The signal applied on the SCL input is used to strobe the data available on SDA(in) and to output the data on SDA(out). 2.2 Serial data (SDA) SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an open drain output that may be wired-AND with other open drain or open collector signals on the bus. A pull-up resistor must be connected from serial data (SDA) to VCC (Figure 15 and Figure 16 indicates how to calculate the value of the pull-up resistor). 2.3 Chip enable (E2, E1, E0) (E2, E1,E0) input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7-bit device select code (see Table 5. These inputs must be tied to VCC or VSS to establish the device select code as shown in Figure 7. When not connected (left floating), these inputs are read as low (0, 0, 0). For the 4-balls WLCSP packag.


M24C64-W M24C64-R M24C32-W


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)