BUK9506-55A

Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology which features very low on-state resistance. It is intended for use in automotive and general purpose switching applications. BUK9506-55A QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 5 V VGS = 10 V MAX. 55 75 230 175 6.3 5.8 UNIT V A W ˚C mΩ mΩ PINNING - TO220AB PIN 1 2 3 tab gate drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g source drain 1 23 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ tp≤50µS Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 55 55 10 15 75 75 240 230 175 UNIT V V V V A A A W ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS in free air TYP. 60 MAX. 0.65 UNIT K/W K/W December 1998 1 Rev 1.100 Philips Semiconductors Product ...