Philips Semiconductors
Product Specification
PowerMOS transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhance...
Philips Semiconductors
Product Specification
PowerMOS
transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power
transistor in a plastic full-pack envelope. The device is intended for use in Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in automotive and general purpose switching applications.
BUK545-100A/B
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER BUK545 Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V MAX. -100A 100 13 30 150 0.085 MAX. -100B 100 12 30 150 0.11 UNIT V A W ˚C Ω
PINNING - SOT186
PIN 1 2 3 gate drain source DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
d
g
case isolated
1 2 3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction Temperature CONDITIONS RGS = 20 kΩ tp ≤ 50 µs Ths = 25 ˚C Ths = 100 ˚C Ths = 25 ˚C Ths = 25 ˚C MIN. - 55 -100A 13 8.2 52 30 150 150 MAX. 100 100 15 20 -100B 12 7.5 48 UNIT V V V V A A A W ˚C ˚C
THERMAL RESISTANCES
SYMBOL Rth j-hs Rth j-a PARAMETER Thermal resistance junction to heatsink Thermal resistance junction to ambient COND...